SEMICONDUCTOR LIGHT EMITTING DEVICE

• US 20100207159A1
• Filed: 02/12/2010
• Published: 08/19/2010
• Est. Priority Date: 02/16/2009
• Status: Active Grant

• Current Assignee: LG Innotek Company Limited (LG Corporation)
• Original Assignee: LG Innotek Company Limited (LG Corporation)
• Inventors: JEONG, Hwan Hee
• Granted Patent: US 8,269,250 B2
• Time in Patent Office: Days
• US Class Current: 257/103
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 33/0093 Wafer bonding; Removal of the growth substrate
• CPC Class Codes: H01L 33/44 characterised by the coatings, e.g. passivation layer or anti-reflective coating

Abstract

Disclosed is a semiconductor light emitting device. The semiconductor light emitting device includes a light emitting structure including a plurality of compound semiconductor layers, a second electrode layer below the light emitting structure, a channel layer between the light emitting structure and an edge area of the second electrode layer, a buffer layer on the channel layer, and a passivation layer on the buffer layer.

Claims

1. A semiconductor light emitting device comprising:

a light emitting structure including a plurality of compound semiconductor layers;

a second electrode layer below the light emitting structure;

a channel layer between the light emitting structure and an edge area of the second electrode layer;

a buffer layer on the channel layer; and

a passivation layer on the buffer layer.

2. The semiconductor light emitting device according to claim 1, wherein the passivation layer is disposed at an outer peripheral portion of the light emitting structure.

3. The semiconductor light emitting device according to claim 1, wherein the channel layer includes at least one material selected from the group consisting of ITO, IZO, IZTO, IAZO, IGZO, IGTO, AZO, ATO, Si0₂, SiO_x, SiO_xN_y, Si₃N₄, Al₂O₃, and TiO₂.

4. The semiconductor light emitting device according to claim 1, wherein the buffer layer includes one selected from the group consisting of Mo, Ni, Cu, Cr, Fe, Si, and Co, or an alloy including at least two of the above elements.

5. The semiconductor light emitting device according to claim 1, wherein the passivation layer includes at least one material selected from the group consisting of SiO₂, SiO_x, SiO_xN_y, Si₃N₄, Al₂O₃, and TiO₂.

6. The semiconductor light emitting device according to claim 1, wherein the buffer layer includes metal having a thermal expansion coefficient greater than a thermal expansion coefficient of the compound semiconductor layer and less than a thermal expansion coefficient of the passivation layer.

7. The semiconductor light emitting device according to claim 1, further comprising a conductive support member below the second electrode layer.

8. The semiconductor light emitting device according to claim 1, wherein the light emitting structure includes a group III-V compound semiconductor, and

wherein the light emitting structure includes:

a first conductive semiconductor layer;

an active layer below the first conductive semiconductor layer; and

a second conductive semiconductor layer below the active layer.

9. The semiconductor light emitting device according to claim 1, further comprising a first electrode layer on the light emitting structure.

10. The semiconductor light emitting device according to claim 1, wherein the channel layer is formed of a conductive material or an insulating material.

11. The semiconductor light emitting device according to claim 1, wherein the passivation layer surrounds an upper portion and a lateral side of the buffer layer.

12. The semiconductor light emitting device according to claim 1, wherein the passivation layer is formed on the buffer layer and the passivation layer is disposed higher than a top surface of the light emitting structure.

13. The semiconductor light emitting device according to claim 1, wherein an outer end of the buffer layer is formed to correspond to an outer end of the channel layer.

14. The semiconductor light emitting device according to claim 1, wherein the passivation layer is formed between the buffer layer and the light emitting structure, and a portion of the buffer layer is exposed out of the passivation layer.

15. A semiconductor light emitting device comprising:

a light emitting structure including a first conductive semiconductor laver, an active layer below the first conductive semiconductor layer, and a second conductive semiconductor layer below the active layer;

a first electrode layer on the light emitting structure;

a second electrode layer below the light emitting structure;

a channel layer between the light emitting structure and an edge area of the second electrode layer;

a buffer layer on the channel layer; and

a passivation layer on the buffer layer.

16. The semiconductor light emitting device according to claim 15, wherein the buffer layer includes metal having a thermal expansion coefficient greater than a thermal expansion coefficient of the light emitting structure and less than a thermal expansion coefficient of the passivation layer.

17. The semiconductor light emitting device according to claim 15, wherein the passivation layer is disposed at an outer peripheral portion of the light emitting structure.

18. The semiconductor light emitting device according to claim 15, wherein the buffer layer is formed of one selected from the group consisting of Mo, Ni, Cu, Cr, Fe, Si, and Co, or an alloy including at least two of the above elements.

19. The semiconductor light emitting device according to claim 15, wherein the passivation layer is formed on the buffer layer and the passivation layer is disposed higher than a top surface of the light emitting structure.

20. The semiconductor light emitting device according to claim 15, wherein the passivation layer is formed between the buffer layer and the light emitting structure, and a portion of the buffer layer is exposed out of the passivation layer.