METAMATERIAL POWER AMPLIFIER SYSTEMS
First Claim
Patent Images
1. A power amplifying system configured to operate for a plurality of frequency bands, comprising:
- an input matching network configured to perform input impedance matching for input signals in the plurality of frequency bands;
a first frequency selecting module that is coupled to the input matching network and directs the input signal in each of the plurality of frequency bands to an input signal path associated with the frequency band;
one or more transistors that receive the input signals in the plurality of frequency bands and amplify the input signals to generate output signals in the plurality of frequency bands;
a bias circuit to bias the one or more transistors;
an output matching network configured to perform output impedance matching for the output signals in the plurality of frequency bands; and
a second frequency selecting module that is coupled to the output matching network and directs the output signal in each of the plurality of frequency bands to an output signal path associated with the frequency band.
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Accused Products
Abstract
Power amplifying systems and modules and components therein are designed based on CRLH structures, providing high efficiency and linearity.
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Citations
76 Claims
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1. A power amplifying system configured to operate for a plurality of frequency bands, comprising:
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an input matching network configured to perform input impedance matching for input signals in the plurality of frequency bands; a first frequency selecting module that is coupled to the input matching network and directs the input signal in each of the plurality of frequency bands to an input signal path associated with the frequency band; one or more transistors that receive the input signals in the plurality of frequency bands and amplify the input signals to generate output signals in the plurality of frequency bands; a bias circuit to bias the one or more transistors; an output matching network configured to perform output impedance matching for the output signals in the plurality of frequency bands; and a second frequency selecting module that is coupled to the output matching network and directs the output signal in each of the plurality of frequency bands to an output signal path associated with the frequency band. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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12. A power amplifier, comprising:
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an input matching network configured to perform input impedance matching for an input signal in a frequency band; a transistor coupled to the input matching network, the transistor receiving the input signal in the frequency band and amplifying the input signal to generate an output signal in the frequency band; and a frequency selector configured to have a shunt element based on a CRLH structure and a series element and coupled to the transistor, the frequency selector receiving the output signal from the transistor and processing the output signal. - View Dependent Claims (13, 14, 15, 16, 17)
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18. A power amplifier, comprising:
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a transistor having a first terminal and a second terminal, the transistor receiving an input signal at the first terminal, amplifying the input signal to generate an output signal, and outputting the output signal at the second terminal; a CRLH transmission line (TL) coupled to the first terminal of the transistor, the CRLH TL comprising a CRLH structure including a varactor; and a detector coupled to the second terminal of the transistor for detecting the output signal and send an signal associated with phase distortion of the output signal to the CRLH TL, wherein a phase associated with the input signal is varied by the varactor that is controlled by the signal associated with the phase distortion sent from the detector. - View Dependent Claims (20)
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19. The power amplifier as in clam 18, further comprising an output matching network coupled between the second terminal and the detector.
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21. A frequency selecting network comprising:
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a first port; a plurality of second ports associated with a plurality of frequency bands, respectively; and a plurality of signal paths coupling the first port and the plurality of second ports, respectively, forming multifurcated branches, the plurality of signal paths being coupled to a plurality of frequency selectors, respectively, wherein each of the frequency selectors is configured to transmit a signal in a frequency band associated with the frequency selector between the first port and the second port associated with the frequency band; and wherein at least one frequency selector comprises a CRLH structure. - View Dependent Claims (22, 23, 24, 25)
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26. A frequency selector, comprising:
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an input port for receiving signals in a plurality of frequency bands; an output port for outputting a signal in a predetermined frequency band selected from the plurality of frequency bands; a signal path coupling the input port and the output port; and a TL having a first end and a second end, the first end being an distal end of the TL and the second end being an proximal end coupled in shunt to the signal path; wherein the TL is configured to have a phase response that provides an open circuit at the second end for the predetermined frequency band and a shorted circuit at the second end for frequency bands different from the predetermined frequency band. - View Dependent Claims (27, 28, 29, 30, 31, 32, 33, 34)
the TL comprises a CRLH structure and is configured based on the CRLH structure to have the phase response that provides one of 90°
±
(k×
180°
), where k=0, 1, 2, . . . , for the predetermined frequency band and one of 0°
±
(k×
180°
), where k=0, 1, 2, . . . , for the frequency bands other than the predetermined frequency band when the first end is configured to have a shorted circuit.
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28. The frequency selector as in claim 26, further comprising
a second TL coupled in series with the signal path, wherein the second TL is configured to have a phase response to adjust signal properties including transmission and reflection. -
29. The frequency selector as in claim 28, wherein
the second TL is configured to have the phase response that provides an open at the input port for the signals in the frequency bands different from the predetermined frequency band. -
30. The frequency selector as in claim 28, wherein
the second TL comprises an RH structure. -
31. The frequency selector as in claim 28, wherein
the second TL comprises a CRLH structure. -
32. The frequency selector as in claim 26, wherein
the TL comprises an extended-CRLH structure and is configured based on the extended-CRLH structure to have the phase response that provides a short circuit at the second end for more than three frequency bands different from the predetermined frequency band. -
33. The frequency selector as in claim 26, wherein
the TL is configured to have the phase response that provides an open circuit at the second end for the predetermined frequency band and a shorted circuit at the second end for harmonics of the predetermined frequency band. -
34. The frequency selector as in claim 28, further comprising
a third TL having a third end and a fourth end, the third end being a distal end of the third TL and the fourth end being a proximal end coupled in shunt to the signal path, wherein the third TL is configured to have a phase response that provides an open circuit at the fourth end for the predetermined frequency band and a shorted circuit at the fourth end for frequency bands different from the predetermined frequency band.
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35. An active frequency selector, comprising:
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an input port for receiving signals in a plurality of frequency bands; an output port for outputting a first signal in a first predetermined frequency band and a second signal in a second predetermined frequency band, the first and second frequency bands being selected from the plurality of frequency bands; a signal path coupling the input port and the output port; a first TL having a first end and a second end, the first end being a distal end of the first TL; a first active component coupling the second end and the signal path in shunt; a second TL having a third end and a fourth end, the third end being a distal end of the second TL; and a second active component coupling the fourth end and the signal path in shunt, wherein the first TL is configured to have a phase response that provides an open circuit at the second end for the first predetermined frequency band and a shorted circuit at the second end for the second frequency band; and the second TL is configured to have a phase response that provides an open circuit at the fourth end for the second predetermined frequency band and a shorted circuit at the second end for the first frequency band; and wherein the first active component is controlled to be in an on-state to couple the first TL to the signal path and the second active component is controlled to be in an off-state to decouple the second TL to direct the first signal in the first predetermined frequency band to the output port; and the second active component is controlled to be in an on-state to couple the second TL to the signal path and the first active component is controlled to be in an off-state to decouple the first TL to direct the second signal in the second predetermined frequency band to the output port. - View Dependent Claims (36, 37, 38, 39, 40)
the second TL is configured to have a phase response that provides an open circuit at the fourth end for the second predetermined frequency band and a shorted circuit at the second end for the first frequency band and harmonics of the second predetermined frequency band.
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41. A bias circuit for biasing a transistor, comprising:
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a first TL having a first end and a second end; a second TL having a third end and a fourth end; a third TL comprising a CRLH structure and having a fifth end and a sixth end; wherein the first TL, the second TL and the third TL are coupled radially to form a common portion with the first end, third end and the fifth end; the first TL is configured to receive a bias signal from an external supply through the second end; and the second TL is configured to send the bias signal to an RF signal path through the fourth end to bias the transistor coupled to the RF signal path. - View Dependent Claims (42, 43, 44)
the third TL is configured based on the CRLH structure to have the third phase response to compensate for the arbitrary impedances.
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44. The bias circuit as in claim 43, wherein
the third phase response provides phases for the plurality of frequency bands chosen from k× - 180°
, where k=0, ±
1, ±
2 . . . , between the fourth end and the sixth end to compensate for the arbitrary impedances to have an open circuit at the fourth end for the plurality of frequency bands when the sixth end is open; andthe third phase response provides phases for the plurality of frequency bands chosen from k×
90°
, where k=±
1, ±
2 . . . , between the fourth end and the sixth end to compensate for the arbitrary phases to have an open circuit at the fourth end for the plurality of frequency bands when the sixth end is shorted.
- 180°
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45. A power amplifying system configured to operate for a plurality of frequency bands, comprising:
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an input matching network configured to perform input impedance matching for input signals in the plurality of frequency bands; a frequency selecting module that is coupled to the input matching network and directs the input signal in each of the plurality of frequency bands to an input signal path associated with the frequency band; one or more transistors that receive the input signals in the plurality of frequency bands and amplify the input signals to generate output signals in the plurality of frequency bands; and a bias circuit to bias the one or more transistors; an output matching network configured to perform output impedance matching for the output signals in the plurality of frequency bands and output the output signals. - View Dependent Claims (46, 47, 48, 49)
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50. A power amplifying system configured to operate for a plurality of frequency bands, comprising:
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an input matching network configured to perform input impedance matching for input signals in the plurality of frequency bands; one or more transistors that receive the input signals in the plurality of frequency bands and amplify the input signals to generate output signals in the plurality of frequency bands; a bias circuit to bias the one or more transistors; an output matching network configured to perform output impedance matching for the output signals in the plurality of frequency bands; and a frequency selecting module that is coupled to the output matching network and directs the output signal in each of the plurality of frequency bands to an output signal path to output the output signals. - View Dependent Claims (51, 52, 53, 54)
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55. A method of making a power amplifying system operable for a plurality of frequency bands, the method comprising:
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forming an input matching network to perform input impedance matching for input signals in the plurality of frequency bands; coupling a plurality of input ports that receive the input signals in the plurality of frequency bands, respectively, to the input matching network; coupling a first frequency selecting module to the input matching network to direct the input signal in each of the plurality of frequency bands to an input signal path associated with the plurality of frequency bands; coupling a multiband transistor to the input signal path to receive the input signals in the plurality of frequency bands and amplify the input signals to generate output signals in the plurality of frequency bands; forming an output matching network to perform output impedance matching for output signals in the plurality of frequency bands; coupling a second frequency selecting module between the multiband transistor and the output matching network to direct the output signal in each of the plurality of frequency bands to an output signal path associated with the frequency band; and coupling a plurality of output ports to the output signal paths associated with the plurality of frequency bands, respectively, to output the output signals. - View Dependent Claims (56, 57, 58)
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59. A method of making a power amplifying system operable for a plurality of frequency bands, the method comprising:
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forming an input matching network to perform input impedance matching for input signals in the plurality of frequency bands; coupling a first frequency selecting module to the input matching network to direct the input signal in each of the plurality of frequency bands to an input signal path associated with the frequency band; coupling an input port that receives the input signals in the plurality of frequency bands to the frequency selecting module; coupling a plurality of transistors that receive the input signals through the input signal paths associated with the plurality of frequency bands, respectively, and amplify the input signals to generate output signals in the plurality of frequency bands; forming an output matching network to perform output impedance matching for output signals in the plurality of frequency bands; coupling a second frequency selecting module to the output matching network to direct the output signal in each of the plurality of frequency bands to an output signal path associated with the plurality of frequency bands; and coupling an output port to the output signal path to output the output signals. - View Dependent Claims (60, 61, 62)
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63. A method of making a class-J power amplifier, comprising:
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forming an input matching network to perform input impedance matching for an input signal in a frequency band; coupling a transistor to the input matching network to receive the input signal in the frequency band and amplify the input signal to generate an output signal in the frequency band; forming a bias circuit to bias the transistor with class-AB; forming a frequency selector to have a shunt element based on a CRLH structure and a series element based on an RH structure; and coupling the frequency selector to the transistor to receive and process the output signal. - View Dependent Claims (64, 65, 66, 67)
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68. A method of making a frequency selector, comprising:
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forming an input port to receive signals in a plurality of frequency bands; forming an output port to output a signal in a predetermined frequency band selected from the plurality of frequency bands; forming a signal path between the input port and the output port; forming a TL having a first end and a second end; coupling the second end of the TL in shunt to the signal path; and configuring the TL to have a phase response that provides an open circuit at the second end for the predetermined frequency band and a shorted circuit at the second end for frequency bands other than the predetermined frequency band. - View Dependent Claims (69, 70)
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71. A method of using a power amplifying system operable for a plurality of frequency bands, the method comprising:
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receiving input signals in the plurality of frequency band; performing input impedance matching for input signals in the plurality of frequency bands based on an input matching network; directing the input signal in each of the plurality of frequency bands to an input signal path associated with the frequency band by coupling a first frequency selecting module to the input matching network; using one or more transistors to amplify the input signals to generate output signals in the plurality of frequency bands; performing output impedance matching for output signals in the plurality of frequency bands based on an output matching network; directing the output signal in each of the plurality of frequency bands to an output signal path associated with the frequency band by coupling a second frequency selecting module to the output matching network; and outputting the output signals. - View Dependent Claims (72, 73)
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74. A method of using a class-J power amplifier, comprising:
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receiving an input signal in a frequency band; performing input impedance matching for the input signal in the frequency band; using a transistor to amplify the input signal to generate an output signal in the frequency band by coupling the transistor to the input matching network; biasing the transistor with class-AB; and processing the output signal by coupling a frequency selector to the transistor, the frequency selector formed to have a shunt element based on a CRLH structure and a series element based on an RH structure. - View Dependent Claims (75, 76)
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Specification