METHOD OF MAKING A SEMICONDUCTOR CHIP ASSEMBLY WITH A POST/BASE HEAT SPREADER AND DUAL ADHESIVES

• US 20100210049A1
• Filed: 04/14/2010
• Published: 08/19/2010
• Est. Priority Date: 03/25/2008
• Status: Active Grant

• Current Assignee: Bridge Semiconductor Corporation
• Original Assignee: Bridge Semiconductor Corporation
• Inventors: Lin, Charles W.C., Lim, Sangwhoo, Wang, Chia-Chung
• Granted Patent: US 8,003,416 B2
• Time in Patent Office: Days
• US Class Current: 438/26
• CPC Class Codes: H01L 21/486 Via connections through the substrate with or without pins
• CPC Class Codes: H01L 2224/32188 the layer connector connecting to a bonding area protruding from the surface of the item
• CPC Class Codes: H01L 2224/45144 Gold (Au) as principal constituent
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/49171 Fan-out arrangements
• CPC Class Codes: H01L 2224/85205 Ultrasonic bonding
• CPC Class Codes: H01L 23/3677 Wire-like or pin-like cooling fins or heat sinks
• CPC Class Codes: H01L 23/49575 Assemblies of semiconductor devices on lead frames
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01012 Magnesium [Mg]
• CPC Class Codes: H01L 2924/01019 Potassium [K]
• CPC Class Codes: H01L 2924/01046 Palladium [Pd]
• CPC Class Codes: H01L 2924/01078 Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 Gold [Au]
• CPC Class Codes: H01L 2924/01087 Francium [Fr]
• CPC Class Codes: H01L 2924/12041 LED
• CPC Class Codes: H01L 2924/19041 being a capacitor
• CPC Class Codes: H01L 33/483 Containers
• CPC Class Codes: H01L 33/642 : characterized by the shape
• CPC Class Codes: H05K 1/0204 : using means for thermal conduction connection in the thickness direction of the substrate H05K1/0207 takes precedence
• CPC Class Codes: H05K 2201/09054 : Raised area or protrusion of metal substrate
• CPC Class Codes: H05K 2201/10106 : Light emitting diode [LED]
• CPC Class Codes: H05K 2201/10969 : Metallic case or integral heatsink of component electrically connected to a pad on PCB
• CPC Class Codes: H05K 3/0061 : onto a metallic substrate, e.g. a heat sink heat sinks for electric apparatus H05K7/20
• CPC Class Codes: H05K 3/386 : by the use of an organic polymeric bonding layer, e.g. adhesive

Abstract

A method of making a semiconductor chip assembly includes providing a post and a base, mounting a first adhesive on the base including inserting the post through an opening in the first adhesive, mounting a conductive layer on the base including aligning the post with an aperture in the conductive layer, providing a conductive trace that includes a pad, a terminal and a selected portion of the conductive layer, then flowing a second adhesive into and downward in a gap between the post and the conductive trace, solidifying the second adhesive, then mounting a semiconductor device on a heat spreader that includes the post and the base, electrically connecting the semiconductor device to the conductive trace and thermally connecting the semiconductor device to the heat spreader.

Claims

1-35. -35. (canceled)

36. A method of making a semiconductor chip assembly, comprising:

providing a post, a base, a conductive layer and a first adhesive, wherein

the post is adjacent to the base, extends above the base in an upward direction and extends through an opening in the first adhesive into an aperture in the conductive layer,

the base extends below the post in a downward direction opposite the upward direction and extends laterally from the post in lateral directions orthogonal to the upward and downward directions,

the first adhesive is mounted on and extends above the base and is sandwiched between the base and the conductive layer, and

the conductive layer is mounted on and extends above the first adhesive and is mechanically attached to the base by the first adhesive;

providing a conductive trace that includes a pad, a terminal and a selected portion of the conductive layer;

flowing a second adhesive into and downward in a gap that laterally surrounds and is adjacent to the post, thereby contacting the adhesives with one another;

solidifying the second adhesive;

then

mounting a semiconductor device on a heat spreader that includes the post and the base, wherein the semiconductor device overlaps the post and the second adhesive overlaps the conductive trace and does not cover the post and the pad in the upward direction;

electrically connecting the semiconductor device to the pad, thereby electrically connecting the semiconductor device to the terminal; and

thermally connecting the semiconductor device to the post, thereby thermally connecting the semiconductor device to the base.

37. The method of claim 36, wherein providing the post and the base includes:

providing a metal plate;

forming an etch mask on the metal plate that selectively exposes the metal plate;

etching the metal plate in a pattern defined by the etch mask, thereby forming a recess in the metal plate that extends into but not through the metal plate; and

then

removing the etch mask, wherein the post includes an unetched portion of the metal plate that protrudes above the base and is laterally surrounded by the recess, and the base includes an unetched portion of the metal plate below the post and the recess.

38. The method of claim 36, wherein:

providing the first adhesive includes providing a pressure-sensitive adhesive tape;

flowing the second adhesive includes depositing a liquid resin over the conductive trace and into the gap; and

solidifying the second adhesive includes solidifying the liquid resin.

39. The method of claim 36, wherein solidifying the second adhesive includes solidifying a solder mask for the conductive trace.

40. The method of claim 36, wherein mounting the conductive layer includes mounting the conductive layer alone on the first adhesive.

41. The method of claim 36, wherein mounting the conductive layer includes mounting the conductive layer and a dielectric layer on the first adhesive.

42. The method of claim 36, wherein providing the pad includes removing selected portions of the conductive layer before solidifying the second adhesive.

43. The method of claim 36, wherein providing the pad and the terminal includes removing selected portions of the conductive layer before solidifying the second adhesive.

44. The method of claim 36, wherein mounting the semiconductor device includes providing a first solder joint between the semiconductor device and the pad and a second solder joint between the semiconductor device and the post, electrically connecting the semiconductor device includes providing the first solder joint between the semiconductor device and the pad, and thermally connecting the semiconductor device includes providing the second solder joint between the semiconductor device and the post.

45. The method of claim 36, wherein mounting the semiconductor device includes providing a die attach between the semiconductor device and the post, electrically connecting the semiconductor device includes providing a wire bond between the semiconductor device and the pad, and thermally connecting the semiconductor device includes providing the die attach between the semiconductor device and the post.

46. A method of making a semiconductor chip assembly, comprising:

providing a post and a base, wherein the post is adjacent to and integral with the base and extends above the base in an upward direction, and the base extends below the post in a downward direction opposite the upward direction and extends laterally from the post in lateral directions orthogonal to the upward and downward directions;

providing a first adhesive, wherein an opening extends through the first adhesive;

providing a conductive layer, wherein an aperture extends through the conductive layer;

mounting the first adhesive on the base, including inserting the post into the opening, wherein the first adhesive extends above the base and the post extends through the opening;

mounting the conductive layer on the base, including inserting the post into the aperture, wherein the conductive layer extends above and is mounted on the first adhesive and the first adhesive is sandwiched between the base and the conductive layer;

then

applying pressure to the first adhesive, thereby deforming the first adhesive and attaching the base to the conductive layer;

providing a conductive trace that includes a pad, a terminal and a routing line, wherein the pad, the terminal and the routing line include selected portions of the conductive layer and an electrically conductive path between the pad and the terminal includes the routing line;

flowing a second adhesive into and downward in a gap that laterally surrounds and is adjacent to the post after applying pressure to the first adhesive, thereby contacting the adhesives with one another;

solidifying the second adhesive;

then

mounting a semiconductor device on a heat spreader that includes the post and the base, wherein the semiconductor device overlaps the post and the second adhesive overlaps the conductive trace and does not cover the post and the pad in the upward direction;

electrically connecting the semiconductor device to the pad, thereby electrically connecting the semiconductor device to the terminal; and

thermally connecting the semiconductor device to the post, thereby thermally connecting the semiconductor device to the base.

47. The method of claim 46, wherein providing the post and the base includes:

providing a metal plate;

forming an etch mask on the metal plate that selectively exposes the metal plate;

etching the metal plate in a pattern defined by the etch mask, thereby forming a recess in the metal plate that extends into but not through the metal plate; and

then

removing the etch mask, wherein the post includes an unetched portion of the metal plate that protrudes above the base and is laterally surrounded by the recess, and the base includes an unetched portion of the metal plate below the post and the recess.

48. The method of claim 46, wherein:

providing the first adhesive includes providing a pressure-sensitive adhesive tape;

flowing the second adhesive includes depositing a liquid resin over the conductive trace and into the gap; and

solidifying the second adhesive includes solidifying the liquid resin, thereby solidifying a solder mask for the conductive trace.

49. The method of claim 46, wherein mounting the conductive layer includes mounting the conductive layer alone on the first adhesive.

50. The method of claim 46, wherein mounting the conductive layer includes mounting the conductive layer and a dielectric layer on the first adhesive.

51. The method of claim 46, wherein mounting the conductive layer includes mounting the conductive layer on the first adhesive and then mounting the conductive layer and the first adhesive on the base.

52. The method of claim 46, wherein mounting the conductive layer includes mounting the conductive layer and a dielectric layer on the first adhesive and then mounting the conductive layer, the dielectric layer and the first adhesive on the base.

53. The method of claim 46, wherein providing the pad, the terminal and the routing line includes removing selected portions of the conductive layer using an etch mask that defines the pad, the terminal and the routing line.

54. The method of claim 46, wherein mounting the semiconductor device includes mounting an LED package that includes an LED chip on the pad using a first solder joint and on the post using a second solder joint, electrically connecting the semiconductor device includes providing the first solder joint between the LED package and the pad, and thermally connecting the semiconductor device includes providing the second solder joint between the LED package and the post.

55. The method of claim 46, wherein mounting the semiconductor device includes providing a die attach between the semiconductor device and the post, electrically connecting the semiconductor device includes providing a wire bond between the semiconductor device and the pad, and thermally connecting the semiconductor device includes providing the die attach between the semiconductor device and the post.

56. A method of making a semiconductor chip assembly, comprising:

providing a post, a base, a substrate and a first adhesive, wherein

the substrate includes a conductive layer and a dielectric layer,

the post is adjacent to the base, extends above the base in an upward direction, extends through an opening in the first adhesive and extends into an aperture in the substrate,

the base extends below the post in a downward direction opposite the upward direction and extends laterally from the post in lateral directions orthogonal to the upward and downward directions,

the first adhesive is mounted on and extends above the base, is sandwiched between the base and the substrate and is solidified,

the substrate is mounted on and extends above the first adhesive, and the conductive layer extends above the dielectric layer, and

a gap is located in the aperture between the post and the substrate and the gap laterally surrounds and is adjacent to the post;

then

providing a conductive trace that includes a pad and a terminal, wherein the conductive trace includes a selected portion of the conductive layer and the pad is electrically connected to the terminal;

then

flowing a second adhesive into and downward in the gap, thereby contacting the adhesives with one another;

solidifying the second adhesive;

then

mounting a semiconductor device on a heat spreader that includes the post and the base, wherein the semiconductor device overlaps the post and the second adhesive overlaps the conductive trace and does not cover the post and the pad in the upward direction;

electrically connecting the semiconductor device to the pad, thereby electrically connecting the semiconductor device to the terminal; and

thermally connecting the semiconductor device to the post, thereby thermally connecting the semiconductor device to the base.

57. The method of claim 56, wherein providing the post and the base includes:

providing a metal plate;

forming an etch mask on the metal plate that selectively exposes the metal plate;

etching the metal plate in a pattern defined by the etch mask, thereby forming a recess in the metal plate that extends into but not through the metal plate; and

then

removing the etch mask, wherein the post includes an unetched portion of the metal plate that protrudes above the base and is laterally surrounded by the recess, and the base includes an unetched portion of the metal plate below the post and the recess.

58. The method of claim 56, wherein:

providing the first adhesive includes providing a pressure-sensitive adhesive tape;

flowing the second adhesive includes depositing a liquid resin over the conductive trace and into the gap; and

solidifying the second adhesive includes solidifying the resin, thereby solidifying a solder mask for the conductive trace.

59. The method of claim 56, wherein providing the substrate and the first adhesive includes:

attaching the conductive layer to the dielectric layer;

then

attaching the first adhesive to the dielectric layer;

then

forming the opening and the aperture; and

then

mounting the conductive layer, the dielectric layer and the first adhesive on the base.

60. The method of claim 56, wherein mounting the conductive layer includes mounting the conductive layer and the dielectric layer on the first adhesive and then mounting the conductive layer, the dielectric layer and the first adhesive on the base.

61. The method of claim 56, wherein providing the pad includes removing selected portions of the conductive layer before solidifying the second adhesive.

62. The method of claim 56, wherein providing the pad and the terminal includes removing selected portions of the conductive layer before solidifying the second adhesive.

63. The method of claim 56, wherein providing the terminal includes removing selected portions of the base before solidifying the second adhesive.

64. The method of claim 56, wherein mounting the semiconductor device includes mounting an LED package that includes an LED chip on the pad using a first solder joint and on the post using a second solder joint, electrically connecting the semiconductor device includes providing the first solder joint between the LED package and the pad, and thermally connecting the semiconductor device includes providing the second solder joint between the LED package and the post.

65. The method of claim 56, wherein mounting the semiconductor device includes providing a die attach between the semiconductor device and the post, electrically connecting the semiconductor device includes providing a wire bond between the semiconductor device and the pad, and thermally connecting the semiconductor device includes providing the die attach between the semiconductor device and the post.

66. A method of making a semiconductor chip assembly, comprising:

providing a post and a base, wherein the post is adjacent to and integral with the base and extends above the base in an upward direction, and the base extends below the post in a downward direction opposite the upward direction and extends laterally from the post in lateral directions orthogonal to the upward and downward directions;

providing a first adhesive, wherein an opening extends through the first adhesive;

providing a substrate that includes a conductive layer and a dielectric layer, wherein an aperture extends through the substrate;

mounting the first adhesive on the base, including inserting the post through the opening, wherein the first adhesive extends above the base and the post extends through the opening;

mounting the substrate on the base, including inserting the post into the aperture, wherein the substrate extends above the first adhesive, the conductive layer extends above the dielectric layer, the post extends through the opening into the aperture, the first adhesive is sandwiched between the base and the substrate and is solidified, and a gap is located in the aperture between the post and the substrate and the gap laterally surrounds and is adjacent to the post;

then

moving the base and the substrate towards one another, thereby moving the post upward in the aperture and applying pressure to the first adhesive between the base and the substrate, wherein the pressure forces the first adhesive to deform and attach the base to the substrate;

then

providing a conductive trace that includes a pad, a terminal and a routing line, wherein the pad, the terminal and the routing line include selected portions of the conductive layer and an electrically conductive path between the pad and the terminal includes the routing line;

then

flowing the second adhesive into and downward in the gap, thereby contacting the adhesives with one another;

then

applying heat to solidify the second adhesive;

then

mounting a semiconductor device on a heat spreader that includes the post and the base, wherein the semiconductor device overlaps the post and the second adhesive overlaps the routing line and does not cover the post and the pad in the upward direction;

electrically connecting the semiconductor device to the pad, thereby electrically connecting the semiconductor device to the terminal; and

thermally connecting the semiconductor device to the post, thereby thermally connecting the semiconductor device to the base.

67. The method of claim 66, wherein providing the post and the base includes:

providing a metal plate;

forming an etch mask on the metal plate that selectively exposes the metal plate;

etching the metal plate in a pattern defined by the etch mask, thereby forming a recess in the metal plate that extends into but not through the metal plate; and

then

removing the etch mask, wherein the post includes an unetched portion of the metal plate that protrudes above the base and is laterally surrounded by the recess, and the base includes an unetched portion of the metal plate below the post and the recess.

68. The method of claim 66, wherein:

providing the first adhesive includes providing a pressure-sensitive adhesive tape;

flowing the second adhesive includes depositing a liquid resin over the conductive trace and into the gap; and

solidifying the second adhesive includes solidifying the liquid resin, thereby solidifying a solder mask for the conductive trace.

69. The method of claim 66, wherein providing the substrate and the first adhesive includes:

attaching the conductive layer to the dielectric layer;

then

attaching the first adhesive to the dielectric layer;

then

forming the opening and the aperture; and

then

mounting the conductive layer, the dielectric layer and the first adhesive on the base.

70. The method of claim 66, wherein providing the pad, the terminal and the routing line includes removing selected portions of the conductive layer using an etch mask that defines the pad, the terminal and the routing line after applying pressure to the first adhesive and before solidifying the second adhesive.