CALCULATION PROCESSING APPARATUS AND METHOD

• US 20100214936A1
• Filed: 09/12/2008
• Published: 08/26/2010
• Est. Priority Date: 09/26/2007
• Status: Active Grant

• Current Assignee: Canon Kabushiki Kaisha (Canon Inc.)
• Original Assignee: Canon Kabushiki Kaisha (Canon Inc.)
• Inventors: Ito, Yoshinori, Yamamoto, Takahisa, Kato, Masami
• Granted Patent: US 8,391,306 B2
• Time in Patent Office: Days
• US Class Current: 370/252
• CPC Class Codes: G06N 3/04 Architecture, e.g. interconnection topology
• CPC Class Codes: G06N 3/045 Combinations of networks
• CPC Class Codes: G06N 3/063 using electronic means
• CPC Class Codes: G06V 10/454 Integrating the filters into a hierarchical structure, e.g. convolutional neural networks [CNN]
• CPC Class Codes: G06V 10/955 using specific electronic processors

Abstract

A calculation processing apparatus, which executes network calculations by a hierarchical network configured by connecting a plurality of logical processing nodes that execute calculations for input data to generate calculation result data, calculates memory sizes of buffers required for the network calculations, based on the configuration of the network calculations, in association with a plurality of types of buffer assignment methods for assigning storage areas for intermediate buffers used to hold calculation result data in correspondence with the plurality of processing nodes which configure the network, and executes the network calculations using buffers assigned by the buffer assignment method, which is selected based on the calculated memory size, in the execution sequence according to that buffer assignment method.

Claims

1. A calculation processing apparatus for executing a network calculation by a network configured by connecting a plurality of logical processing nodes, the apparatus comprising:

a calculation unit configured to calculate memory sizes of storage areas for buffers used to hold calculation result data by the plurality of processing nodes for a plurality of types of buffer assignment methods of assigning the storage areas to a memory, on the basis of a configuration of the network;

a selection unit configured to select one of the plurality of types of buffer assignment methods based on the memory sizes calculated by the calculation unit; and

an execution unit configured to control the respective processing nodes to execute calculations in the network calculations using the buffers assigned by the buffer assignment method selected by the selection unit.

2. The apparatus according to claim 1, wherein the network is a hierarchical network configured by hierarchically connecting a plurality of logical processing nodes.

3. The apparatus according to claim 1, further comprising an acquisition unit configured to acquire a memory size assignable as the buffers,

wherein the selection unit selects the buffer assignment method with which the memory size calculated by the calculation unit is not more than the memory size acquired by the acquisition unit from the plurality of types of buffer assignment methods.

4. The apparatus according to claim 3, wherein when there are a plurality of buffer assignment methods with which the memory sizes calculated by the calculation unit are not more than the memory size acquired by the acquisition unit, the selection unit selects one of these buffer assignment methods based on a predetermined priority order.

5. The apparatus according to claim 3, further comprising a division unit configured to divide input data when there is no buffer assignment method with which the memory size calculated by the calculation unit is not more than the memory size acquired by the acquisition unit,

wherein the selection unit selects the buffer assignment method to be used in the network calculation for each of divided input data.

6. The apparatus according to claim 1, wherein the plurality of types of buffer assignment methods include:

a band buffer method which assigns a buffer used to hold some of calculation result data to one processing node; and

a page buffer method which assigns a buffer used to hold all calculation result data for the input data to one processing node.

7. The apparatus according to claim 6, wherein the calculation unit calculates a memory size required for the network calculation when the band buffer method is used, by setting sizes of respective buffers of all the processing nodes which execute the network calculation to be a data size required by processing nodes connected after a processing node of interest, and summing the sizes of the buffers.

8. The apparatus according to claim 6, wherein the calculation unit calculates total sizes of the buffers required when all processing nodes which belong to two layers hold all calculation result data for the input data for respective groups each of which includes two adjacent layers included in the configuration of the network, and sets a maximum size of the total sizes as a memory size required for the network calculation when the page buffer method is used.

9. The apparatus according to claim 6, wherein when the band buffer method is selected, the execution unit controls each of the plurality of processing nodes to execute a predetermined processing unit and

the execution unit controls the buffers assigned to the plurality of processing nodes as ring buffers which write calculation results by circulating a memory area corresponding to a size of a calculation result of the processing unit as a unit.

10. The apparatus according to claim 6, wherein when the page buffer method is selected, the execution unit controls processing nodes which belong to a next layer to start calculation processing after outputs of all processing nodes which belong to one layer are generated, and

the execution unit releases buffer areas used by all processing nodes which belong to an (N−

1)-th layer after outputs of all processing nodes which belong to an N-th layer are generated, and assigns the released buffer areas to buffer areas of processing nodes which belong to an (N+1)-th layer and subsequent layers.

11. The apparatus according to claim 1, wherein the calculation to be executed by the processing node is a convolution calculation, and the network configures convolutional neural networks.

12. A calculation processing method for executing a network calculation by a network configured by connecting a plurality of logical processing nodes, the method comprising:

a calculation step of calculating memory sizes of storage areas for buffers used to hold calculation result data by the plurality of processing nodes for a plurality of types of buffer assignment methods for assigning the storage areas to a memory, on the basis of a configuration of the network;

a selection step of selecting one of the plurality of types of buffer assignment methods based on the memory sizes calculated in the calculation step; and

an execution step of controlling the respective processing nodes to execute calculations in the network calculations using the buffers assigned by the buffer assignment method selected in the selection step.

14. A computer-readable storage medium storing a computer program for making a computer execute a calculation processing method according to claim 12.

13. (canceled)