FABRICATING A DEVICE WITH A DIAMOND LAYER

• US 20100216301A1
• Filed: 02/23/2009
• Published: 08/26/2010
• Est. Priority Date: 02/23/2009
• Status: Active Grant

• Current Assignee: Raytheon Company (Rtx Corporation)
• Original Assignee: Raytheon Company (Rtx Corporation)
• Inventors: Deelman, Peter W., CHEN, MARY Y.
• Granted Patent: US 7,892,881 B2
• Time in Patent Office: Days
• US Class Current: 438/604
• CPC Class Codes: H01L 29/1602 Diamond
• CPC Class Codes: H01L 29/2003 Nitride compounds
• CPC Class Codes: H01L 29/66462 with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT
• CPC Class Codes: H01L 29/7786 with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT

Abstract

In one aspect, a method includes forming a silicon dioxide layer on a surface of a diamond layer disposed on a gallium nitride (GaN)-type layer. The method also includes etching the silicon dioxide layer to form a pattern. The method further includes etching portions of the diamond exposed by the pattern.

Claims

1. A method, comprising:

forming a silicon dioxide layer on a surface of a diamond layer disposed on a gallium nitride (GaN)-type layer;

etching the silicon dioxide layer to form a pattern; and

etching portions of the diamond exposed by the pattern.

2. The method of claim 1 wherein forming a silicon dioxide layer on a surface of a diamond layer disposed on a gallium nitride (GaN)-type layer comprises forming a silicon dioxide layer on a surface of a diamond layer disposed on an aluminum gallium nitride (AlGaN) layer disposed on a GaN layer.

3. The method of claim 1, further comprising:

depositing photoresist onto the silicon dioxide layer; and

using a photolithographic process to form the pattern with the photoresist.

6. The method of claim 1 wherein etching portions of the diamond layer comprises etching portions of the diamond using an inductively coupled plasma (ICP) process.

7. The method of claim 6 wherein etching portions of the diamond layer comprises using the ICP process using an oxygen mixture.

8. The method of claim 6 wherein etching portions of the diamond layer comprises using the ICP process using an oxygen and argon mixture.

9. The method of claim 1, further comprising using a photolithographic process and a metallization process to form an ohmic contact.

10. The method of claim 9 wherein the metallization process comprises:

depositing a metal;

lifting off the metal comprising removal of photoresist; and

annealing the metal.

11. The method of claim 1, further comprising using a photolithographic process and a metallization process to form a gate.

12. The method of claim 1, further comprising using an electron beam lithographic process and a metallization process to form a gate.

13. The method of claim 1 wherein forming a silicon dioxide layer on a surface of a diamond layer disposed on a gallium nitride layer comprises forming a silicon dioxide layer on a surface of a first diamond layer disposed on a first surface of a gallium nitride layer, and

further comprising disposing a second diamond layer on a second surface of the GaN-type layer opposite the first surface of the GaN-type layer.

14. The method of claim 1, further comprising fabricating one of a high frequency device, a high electron mobility transistor (HEMT) or a microwave device from the GaN-type layer.

15. The method of claim 1 wherein forming a silicon dioxide layer on a surface of a diamond layer disposed on a gallium nitride (GaN)-type layer comprises foiling a silicon dioxide layer on a surface of a diamond layer disposed on a GaN-type layer comprising at least one of undoped GaN, doped GaN and GaN combined with another element.

4. The method of claim I wherein etching the silicon dioxide layer to form a pattern comprises etching the silicon dioxide layer using an inductively coupled plasma (ICP) process.

5. The method of claim 4 wherein etching the silicon dioxide layer using the ICP process comprises using the ICP process using a carbon tetrafluoride and oxygen mixture.

16. A method, comprising:

forming a silicon dioxide layer on a diamond layer disposed on a gallium nitride (GaN)-type layer;

etching portions of the silicon dioxide based on a first isolation mask to expose portions of the diamond layer;

etching the portions of the diamond layer exposed by the silicon dioxide after the first etch;

etching portions of the silicon dioxide layer to expose a first portion and a second portion of the diamond layer;

etching the first portion and the second portion of the diamond layer to expose a first portion and a second portion of the GaN-type layer; and

etching portions of the GaN-type layer based on a second isolation mask.

17. The method of claim 16 wherein forming a silicon dioxide layer on a surface of a diamond layer disposed on a gallium nitride (GaN)-type layer comprises forming a silicon dioxide layer on a surface of a diamond layer disposed on an aluminum gallium nitride (AlGaN) layer disposed on a GaN layer.

18. The method of claim 16, further comprising:

using a first metallization process to form an ohmic contact on the first exposed portion of the GaN-type layer; and

using a second metallization process to form a gate on the second exposed portion of the GaN-type layer.

19. The method of claim 16, further comprising fabricating one of a high frequency device, a high electron mobility transistor (HEMT) or a microwave device from the GaN-type layer.

20. The method of claim 16, wherein forming a silicon dioxide layer on a surface of a diamond layer disposed on a gallium nitride (GaN)-type layer comprises forming a silicon dioxide layer on a surface of a diamond layer disposed on a GaN-type layer comprising at least one of undoped GaN, doped GaN and GaN combined with another element.

21. A method, comprising:

forming a first silicon dioxide layer on a diamond layer disposed on a gallium nitride (GaN)-type layer;

etching portions of the first silicon dioxide layer based on a first ohmic mask to expose portions of the diamond layer;

etching the portions of the diamond layer exposed by the first silicon dioxide layer to expose a first portion of the GaN-type layer;

forming a second silicon dioxide layer on the diamond layer and the exposed first portion of the GaN-type layer;

etching a first portion of the second silicon dioxide layer based on a first isolation mask to expose portions of the diamond layer;

etching the first portion of the diamond layer exposed by the second silicon dioxide;

etching a second portion of the second silicon dioxide layer; and

etching the second portion of the diamond layer exposed by the second silicon dioxide based to expose a second portion of the GaN-type layer.

22. The method of claim 21 wherein forming a silicon dioxide layer on a surface of a diamond layer disposed on a gallium nitride (GaN)-type layer comprises forming a silicon dioxide layer on a surface of a diamond layer disposed on an aluminum gallium nitride (AlGaN) layer disposed on a GaN layer.

23. The method of claim 21, further comprising:

using a first metallization process to form an ohmic contact on the first portion of the GaN-type layer based on a second ohmic contact mask;

etching portions of the GaN-type layer based on an isolation mask; and

using a second metallization process to form a gate on the second portion of the GaN-type layer.

24. The method of claim 21, further comprising fabricating one of a high frequency device, a high electron mobility transistor (HEMT) or a microwave device from the GaN-type layer.

25. The method of claim 21, wherein forming a first silicon dioxide layer on a surface of a diamond layer disposed on a gallium nitride (GaN)-type layer comprises forming a first silicon dioxide layer on a surface of a diamond layer disposed on a GaN-type layer comprising at least one of undoped GaN, doped GaN and GaN combined with another element.

26. A method, comprising:

forming a silicon dioxide layer on a diamond layer disposed on a gallium nitride (GaN)-type layer;

etching portions of the silicon dioxide layer based on a multipurpose mask to expose portions of the diamond layer; and

etching the portions of the diamond layer exposed by the silicon dioxide to expose a first portion and a second portion of the GaN-type layer.

27. The method of claim 26 wherein forming a silicon dioxide layer on a surface of a diamond layer disposed on a gallium nitride (GaN)-type layer comprises forming a silicon dioxide layer on a surface of a diamond layer disposed on an aluminum gallium nitride (AlGaN) layer disposed on a GaN layer.

28. The method of claim 26, further comprising:

using a first metallization process to form an ohmic contact on the first exposed portion of the GaN-type layer based on an ohmic contact mask;

etching portions of the GaN-type layer based on an isolation mask; and

using a second metallization process to form a gate on the second exposed portion of the GaN-type layer.

29. The method of claim 26, further comprising fabricating one of a high frequency device, a high electron mobility transistor (HEMT) or a microwave device from the GaN-type layer.

30. The method of claim 26, wherein forming a silicon dioxide layer on a surface of a diamond layer disposed on a gallium nitride (GaN)-type layer comprises forming a silicon dioxide layer on a surface of a diamond layer disposed on a GaN-type layer comprising at least one of undoped GaN, doped GaN and GaN combined with another element.