ELECTRONIC SUBSTRATE, SEMICONDUCTOR DEVICE, AND ELECTRONIC DEVICE

• US 20100219927A1
• Filed: 05/17/2010
• Published: 09/02/2010
• Est. Priority Date: 03/03/2006
• Status: Active Grant

• Current Assignee: NVIDIA Corporation
• Original Assignee: Seiko Epson Corporation (Seiko Group)
• Inventors: HASHIMOTO, Nobuaki
• Granted Patent: US 8,610,578 B2
• Time in Patent Office: Days
• US Class Current: 336/200
• CPC Class Codes: H01F 17/0006 Printed inductances printed coils for dynamo-electric machines H02K3/26; printed circuits H05K
• CPC Class Codes: H01F 27/29 Terminals; Tapping arrangements for signal inductances
• CPC Class Codes: H01F 5/00 Coils superconducting coils H01F6/06; fixed inductances of the signal type H01F17/00
• CPC Class Codes: H01F 5/003 Printed circuit coils
• CPC Class Codes: H01L 2223/6677 for antenna, e.g. antenna included within housing of semiconductor device antennas per se H01Q
• CPC Class Codes: H01L 2224/02377 Fan-in arrangement
• CPC Class Codes: H01L 2224/05001 Internal layers
• CPC Class Codes: H01L 2224/05022 the internal layer being at least partially embedded in the surface
• CPC Class Codes: H01L 2224/05024 the internal layer being disposed on a redistribution layer on the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/05548 Bonding area integrally formed with a redistribution layer on the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/05568 the whole external layer protruding from the surface
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/0615 Mirror array, i.e. array having only a reflection symmetry, i.e. bilateral symmetry
• CPC Class Codes: H01L 2224/13022 the bump connector being at least partially embedded in the surface
• CPC Class Codes: H01L 2224/13099 Material
• CPC Class Codes: H01L 2224/16 of an individual bump connector
• CPC Class Codes: H01L 23/3114 the device being a chip scale package, e.g. CSP
• CPC Class Codes: H01L 23/525 with adaptable interconnections
• CPC Class Codes: H01L 23/645 Inductive arrangements H01L23/647, H01L23/66 take precedence
• CPC Class Codes: H01L 24/05 of an individual bonding area
• CPC Class Codes: H01L 24/11 : Manufacturing methods for bumps on insulating substrates H01L21/4853
• CPC Class Codes: H01L 24/12 : Structure, shape, material or disposition of the bump connectors prior to the connecting process
• CPC Class Codes: H01L 25/16 : the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01005 : Boron [B]
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01022 : Titanium [Ti]
• CPC Class Codes: H01L 2924/01023 : Vanadium [V]
• CPC Class Codes: H01L 2924/01024 : Chromium [Cr]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01046 : Palladium [Pd]
• CPC Class Codes: H01L 2924/01047 : Silver [Ag]
• CPC Class Codes: H01L 2924/01074 : Tungsten [W]
• CPC Class Codes: H01L 2924/01075 : Rhenium [Re]
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/04941 : TiN
• CPC Class Codes: H01L 2924/12042 : LASER
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/19015 : including thin film passive components
• CPC Class Codes: H01L 2924/19041 : being a capacitor
• CPC Class Codes: H01L 2924/19042 : being an inductor
• CPC Class Codes: H01L 2924/19043 : being a resistor
• CPC Class Codes: H01L 2924/30105 : Capacitance
• CPC Class Codes: H01L 2924/30107 : Inductance
• CPC Class Codes: H01L 2924/3025 : Electromagnetic shielding
• CPC Class Codes: H01L 2924/351 : Thermal stress
• CPC Class Codes: H01Q 1/2283 : mounted in or on the surface of a semiconductor substrate as a chip-type antenna or integrated with other components into an IC package
• CPC Class Codes: H01Q 1/243 : with built-in antennas
• CPC Class Codes: H01Q 21/28 : Combinations of substantially independent non-interacting antenna units or systems multiple beam H01Q25/00
• CPC Class Codes: H01Q 7/00 : Loop antennas with a substantially uniform current distribution around the loop and having a directional radiation pattern in a plane perpendicular to the plane of the loop

Abstract

An electronic substrate including: a base substrate having an active face and a rear face; and a plurality of inductor elements formed on or above the active face, or formed on or above the rear face.

Claims

1. An electronic substrate comprising:

a base substrate having an active face on which an electronic circuit is formed;

a plurality of inductor elements formed on or above the active face, and having a winding wire, the winding wire having a first end and a second end;

a first electrode and a second electrode formed in an array at a peripheral portion of the active face of the base substrate;

a first connecting wire formed on or above the active face and connected to the first electrode;

a dielectric layer formed between at least some of the inductor elements and the base substrate so as to cover the first connecting wire, including a through hole in which the first end of the winding wire is connected to the first connecting wire; and

a second connecting wire connected to the second end of the winding wire, connected to the second electrode, and formed on the dielectric layer.

2. The electronic substrate according to claim 1, wherein

the inductor elements include:

a first inductor element; and

a second inductor element having an inductance value or an applicable frequency that are different from that of the first inductor element.

3. The electronic substrate according to claim 2, wherein

the first inductor element is used for external power transmission, and the second inductor element is used for external communications.

4. The electronic substrate according to claim 2, further comprising:

a connection terminal formed on the base substrate, used for external power transmission, wherein

the first inductor element and the second inductor element are used for external communications.

5. The electronic substrate according to claim 1, wherein,

the dielectric layer is made of material having a dielectric dissipation factor smaller than that of the base substrate.

8. An electronic device, comprising:

the electronic substrate according to claim 1; and

a body in which the electronic substrate is disposed.

6. A semiconductor device, comprising:

a plurality of electronic substrates, each of which includes;

a base substrate having an active face on which an electronic circuit is formed;

a plurality of inductor elements formed on or above the active face, and having a winding wire, the winding wire having a first end and a second end;

a first electrode and a second electrode formed in an array at a peripheral portion of the active face of the base substrate;

a first connecting wire formed on or above the active face and connected to the first electrode;

a dielectric layer formed between at least some of the inductor element and the base substrate so as to cover the first connecting wire, including a through hole in which the first end of the winding wire is connected to the first connecting wire; and

a second connecting wire connected to the second end of the winding wire, connected to the second electrode, and formed on the dielectric layer, wherein

the electronic substrates are disposed so as to be laminated, the inductor element functions as an antenna sending or receiving electromagnetic waves so as to send or receive signals between the electronic substrates.

7. The semiconductor device according to claim 6, wherein

the inductor elements formed on a pair of the electronic substrates sending or receiving signals are disposed to face each other.