Optimized Selection of Memory Chips in Multi-Chips Memory Devices
First Claim
1. A method, comprising:
- accepting a definition of a type of multi-unit memory device that comprises a set of memory units, each having a respective nominal storage capacity, the definition specifying a target memory size of the multi-unit memory device such that a sum of nominal storage capacities of the memory units in the set is equal to the target memory size;
accepting a plurality of the memory units having respective actual storage capacities, at least some of which differ from the respective nominal storage capacity; and
assembling multi-unit memory devices comprising respective sets of the memory units in accordance with the definition, such that at least one of the sets comprises at least a first memory unit having a first actual storage capacity that is less than the respective nominal storage capacity and at least a second memory unit having a second actual storage capacity that is greater than the nominal storage capacity.
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Accused Products
Abstract
A method includes accepting a definition of a type of multi-unit memory device (28) including a set of memory units (24), each having a respective nominal storage capacity, the definition specifying a target memory size of the memory device such that a sum of nominal storage capacities of the memory units in the set is equal to the target memory size. A plurality of the memory units is accepted. The memory units have respective actual storage capacities, at least some of which differ from the respective nominal storage capacity. Multi-unit memory devices including respective sets of the memory units are assembled, such that at least one of the sets includes at least a first memory unit having a first actual capacity that is less than the respective nominal capacity and at least a second memory unit having a second actual capacity that is greater than the nominal capacity.
146 Citations
31 Claims
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1. A method, comprising:
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accepting a definition of a type of multi-unit memory device that comprises a set of memory units, each having a respective nominal storage capacity, the definition specifying a target memory size of the multi-unit memory device such that a sum of nominal storage capacities of the memory units in the set is equal to the target memory size; accepting a plurality of the memory units having respective actual storage capacities, at least some of which differ from the respective nominal storage capacity; and assembling multi-unit memory devices comprising respective sets of the memory units in accordance with the definition, such that at least one of the sets comprises at least a first memory unit having a first actual storage capacity that is less than the respective nominal storage capacity and at least a second memory unit having a second actual storage capacity that is greater than the nominal storage capacity. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A method, comprising:
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accepting a definition of a type of multi-unit memory device that comprises a set of memory units, each having a respective nominal performance level, the definition specifying a target performance level of the multi-unit memory device; accepting a plurality of the memory units having respective actual performance levels, at least some of which differ from the respective nominal performance levels; and assembling multi-unit memory devices comprising respective sets of the memory units in accordance with the definition, such that at least one of the sets comprises at least a first memory unit having a first actual performance level that is less than the respective nominal performance level and at least a second memory unit having a second actual performance level that is greater than the nominal performance level, so as to cause the multi-unit memory devices to meet the target performance level. - View Dependent Claims (12, 13, 14)
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15. Apparatus, comprising:
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an interface, which is operative to accept a definition of a type of multi-unit memory device that comprises a set of memory units, each having a respective nominal storage capacity, the definition specifying a target memory size of the multi-unit memory device such that a sum of nominal storage capacities of the memory units in the set is equal to the target memory size; and a selection/assembly system, which is coupled to accept a plurality of the memory units having respective actual storage capacities, at least some of which differ from the respective nominal storage capacity, and to assemble multi-unit memory devices comprising respective sets of the memory units in accordance with the definition, such that at least one of the sets comprises at least a first memory unit having a first actual storage capacity that is less than the respective nominal storage capacity and at least a second memory unit having a second actual storage capacity that is greater than the nominal storage capacity. - View Dependent Claims (16, 17, 18, 19, 20, 21, 22, 23, 24)
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25. Apparatus, comprising:
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an interface, which is operative to accept a definition of a type of multi-unit memory device that comprises a set of memory units, each having a respective nominal performance level, the definition specifying a target performance level of the multi-unit memory device; and a selection/assembly system, which is coupled to accept a plurality of the memory units having respective actual performance levels, at least some of which differ from the respective nominal performance levels, and to assemble multi-unit memory devices comprising respective sets of the memory units in accordance with the definition, such that at least one of the sets comprises at least a first memory unit having a first actual performance level that is less than the respective nominal performance level and at least a second memory unit having a second actual performance level that is greater than the nominal performance level, so as to cause the multi-unit memory devices to meet the target performance level. - View Dependent Claims (26, 27, 28)
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29. A memory device, which has a target storage capacity and comprises multiple memory units having respective nominal storage capacities and actual storage capacities, wherein one or more of the actual storage capacities are lower than the respective nominal storage capacities and one or more other actual storage capacities are higher than the respective nominal storage capacities, such that a sum of the actual storage capacities of the multiple memory units is no less than the target storage capacity.
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30. A memory device, which has a target performance level and comprises multiple memory units having respective nominal performance levels and actual performance levels, wherein one or more of the actual performance levels are lower than the respective nominal performance levels and one or more other actual performance levels are higher than the respective nominal performance levels, such that a composite performance level of the memory device meets the target performance level.
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31. A memory device, which comprises a specified number of memory units and has a target memory size, wherein at least one of the memory units has a first actual capacity that is less than the target memory size divided by the specified number of memory units by no more than 20%, and wherein at least one other of the memory units has a second actual capacity that is greater than the target memory size divided by the specified number of units, such that a sum of the actual capacities of the memory units is no less than the target memory size.
Specification