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Optimized Selection of Memory Chips in Multi-Chips Memory Devices

  • US 20100220510A1
  • Filed: 11/04/2008
  • Published: 09/02/2010
  • Est. Priority Date: 11/13/2007
  • Status: Active Grant
First Claim
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1. A method, comprising:

  • accepting a definition of a type of multi-unit memory device that comprises a set of memory units, each having a respective nominal storage capacity, the definition specifying a target memory size of the multi-unit memory device such that a sum of nominal storage capacities of the memory units in the set is equal to the target memory size;

    accepting a plurality of the memory units having respective actual storage capacities, at least some of which differ from the respective nominal storage capacity; and

    assembling multi-unit memory devices comprising respective sets of the memory units in accordance with the definition, such that at least one of the sets comprises at least a first memory unit having a first actual storage capacity that is less than the respective nominal storage capacity and at least a second memory unit having a second actual storage capacity that is greater than the nominal storage capacity.

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