DATA PROTECTION CIRCUIT, DATA PROTECTION METHOD, AND DATA PROCESSING APPARATUS

• US 20100223527A1
• Filed: 03/01/2010
• Published: 09/02/2010
• Est. Priority Date: 03/02/2009
• Status: Abandoned Application

• Current Assignee: Renesas Electronics Corporation
• Original Assignee: NEC Electronics Corporation (Renesas Electronics Corporation)
• Inventors: SUZUKI, Takahiro, KAWAKAMI, Daisuke, AKIYAMA, Takeshi
• Application Number:
  US12/714,999
• Publication Number:
  US 20100223527A1
• Time in Patent Office: Days
• US Class Current: 714/758
• CPC Class Codes: G06F 11/1012 using codes or arrangements adapted for a specific type of error G06F11/1048 takes precedence
• CPC Class Codes: H03M 13/09 Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit

Abstract

A generation unit in a data protection circuit acquires input data from one position on a path that outputs the input data as output data, and generates a second error detecting code. A check unit acquires the input data from another position on the path that is closer to an output side than the acquiring position in the generation unit, and checks the input data using a first error detecting code. Further, a connection unit connects the acquiring position in the generation unit and the acquiring position in the check unit so that the input data is acquired by the check unit subsequent to acquirement by the generation unit.

Claims

1. A data protection circuit to which first input data and a first error detecting code are input, the data protection circuit outputting first output data corresponding to the first input data and a second error detecting code, the data protection circuit comprising:

a first path that outputs the first input data as the first output data;

a first generation unit that acquires the first input data from the first path and generates the second error detecting code; and

a first check unit that acquires the first input data from a position on the first path that is closer to an output side than an acquiring position in the first generation unit and checks the first input data using the first error detecting code.

2. The data protection circuit according to claim 1, wherein a connection unit that connects the acquiring position in the first generation unit and an acquiring position in the first check unit is further provided in the first path so that the first input data is acquired by the first check unit subsequent to acquirement by the first generation unit.

3. The data protection circuit according to claim 1, wherein

the second error detecting code comprises an error correcting code corresponding to the first output data, and

the first generation unit comprises:

a second generation unit that acquires the first input data from one position on the first path, generates the second error detecting code, and externally outputs the generated second error detecting code;

a third generation unit that acquires the first input data from another position on the first path, and generates the second error detecting code; and

a notification unit that notifies an external part that the second error detecting code is not suitable to be used for error correction of the first output data upon detecting mismatch between error detecting codes generated by the second and the third generation units.

4. The data protection circuit according to claim 1, wherein

the first error detecting code comprises an error correcting code corresponding to the first input data, and

the first check unit corrects the first input data and changes the second error detecting code according to the corrected position in the first input data upon detecting an error in the first input data that can be corrected using the first error detecting code.

5. The data protection circuit according to claim 1, further comprising:

a second path that outputs second input data as second output data;

a second generation unit that acquires the second input data from the second path and generates the first error detecting code; and

a second check unit that acquires the second input data from a position on the second path that is closer to an output side than an acquiring position in the second generation unit, and checks the second input data with a second error detecting code that is input according to the second input data.

6. The data protection circuit according to claim 5, wherein a connection unit that connects the acquiring position in the second generation unit and an acquiring position in the second check unit is further provided in the second path so that the second input data is acquired by the second check unit subsequent to acquirement by the second generation unit.

7. The data protection circuit according to claim 5, wherein

the second error detecting code comprises an error correcting code corresponding to the first output data,

the first generation unit comprises:

a third generation unit that acquires the first input data from one position on the first path, generates the second error detecting code, and externally outputs the generated second error detecting code;

a fourth generation unit that acquires the first input data from another position on the first path and generates the second error detecting code; and

a storing unit that externally stores that the second error detecting code is not suitable to be used for error correction of the first output data upon detection of mismatch between both error detecting codes generated by the third and the fourth generation units, and

the second check unit corrects the second input data when the second check unit itself detects an error that can be corrected with a second error detecting code that corresponds to the second input data and the second error detecting code is not stored as not being suitable for the error correction.

8. A data processing apparatus comprising:

first and second processing circuits, each of which processing data; and

a protection circuit to which data and a first error detecting code are input from the first processing circuit, the protection circuit outputting the data and a second error detecting code to the second processing circuit, wherein

the protection circuit generates the second error detecting code corresponding to the data, and thereafter checks the data using the first error detecting code.

9. A data protection method comprising:

generating a first error detecting code corresponding to data that is input, and then checking the data using a second error detecting code input according to the data.

10. The data protection method according to claim 9, comprising:

using an error detecting code that comprises an error correcting code corresponding to the data as the first error detecting code;

generating the first error detecting code for each of two positions that are different from each other on a transfer path of the data; and

determining that the first error detecting code is not suitable to be used for error correction of the data upon detecting mismatch between the error detecting codes that are generated.

11. The data protection method according to claim 10, comprising:

determining whether there is an error in data that can be corrected using the first error detecting code when data check using the first error detecting code is required; and

correcting the data when it is determined that there is the error that can be corrected and it is not determined that the first error detecting code is not suitable to be used for error correction in generating the first error detecting code.

12. The data protection method according to claim 9, comprising:

using an error detecting code that comprises an error correcting code corresponding to the data as the second error detecting code; and

correcting the data and changing the first error detecting code according to the corrected position in the data, upon detecting an error in the data that can be corrected using the second error detecting code.