SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

• US 20100224872A1
• Filed: 02/24/2010
• Published: 09/09/2010
• Est. Priority Date: 03/05/2009
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: KIMURA, Hajime
• Granted Patent: US 8,461,582 B2
• Time in Patent Office: Days
• US Class Current: 257/43
• CPC Class Codes: H01L 27/1214 comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 27/1288 employing particular masking sequences or specially adapted masks, e.g. half-tone mask
• CPC Class Codes: H01L 29/26 including, apart from doping materials or other impurities, elements provided for in two or more of the groups H01L29/16, H01L29/18, H01L29/20, H01L29/22, H01L29/24 , e.g. alloys
• CPC Class Codes: H01L 29/458 for thin film silicon, e.g. source or drain electrode
• CPC Class Codes: H01L 29/4908 for thin film semiconductor, e.g. gate of TFT
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/78633 with a light shield
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

A semiconductor device includes a substrate having an insulating surface; a light-transmitting first electrode provided over the substrate; a light-transmitting second electrode provided over the substrate; a light-transmitting semiconductor layer provided so as to be electrically connected to the first electrode and the second electrode; a first wiring electrically connected to the first electrode; an insulating layer provided so as to cover at least the semiconductor layer; a light-transmitting third electrode provided over the insulating layer in a region overlapping with the semiconductor layer; and a second wiring electrically connected to the third electrode.

Claims

1. A semiconductor device comprising:

a substrate having an insulating surface;

a first electrode that has a light-transmitting property and is provided over the substrate;

a second electrode that has a light-transmitting property and is provided over the substrate;

a semiconductor layer that has a light-transmitting property and is provided so as to be electrically connected to the first electrode and the second electrode;

a first wiring electrically connected to the first electrode;

an insulating layer provided so as to cover at least the semiconductor layer;

a third electrode that has a light-transmitting property and is provided over a portion of the insulating layer overlapping with the semiconductor layer; and

a second wiring electrically connected to the third electrode.

2. The semiconductor device according to claim 1, further comprising a fourth electrode that has a light-transmitting property and is electrically connected to the second electrode.

3. The semiconductor device according to claim 1, further comprising:

a fifth electrode provided so as to overlap with part of the second electrode with the insulating layer interposed between the fifth electrode and the part of the second electrode, and formed by using the same layer as the third electrode; and

a third wiring electrically connected to the fifth electrode and formed using the same layer as the second wiring.

4. The semiconductor device according to claim 1, wherein the semiconductor layer comprises an oxide semiconductor containing indium, gallium, and zinc.

5. The semiconductor device according to claim 1, wherein each of the first electrode, the second electrode, and the third electrode is formed using any one of indium tin oxide, indium tin oxide containing silicon oxide, organoindium, organotin, zinc oxide, titanium nitride, indium zinc oxide containing zinc oxide, a material obtained by adding gallium to zinc oxide, tin oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, and indium tin oxide containing titanium oxide.

6. The semiconductor device according to claim 1, wherein the first wiring and the second wiring have a light-shielding property.

7. The semiconductor device according to claim 1, wherein a layer formed by using the same layer as the semiconductor layer is provided at an intersection of the first wiring and the second wiring.

8. A method for manufacturing a semiconductor device, comprising:

stacking a first conductive layer having a light-transmitting property and a second conductive layer over a substrate having an insulating surface;

forming a first mask over the second conductive layer;

etching the first conductive layer to form a first electrode and a second electrode and etching the second conductive layer to form a third conductive layer, by using the first mask;

recessing the first mask to form a second mask;

etching the third conductive layer by using the second mask to form a first wiring;

forming a semiconductor layer that has a light-transmitting property and is electrically connected to the first electrode and the second electrode;

forming an insulating layer so as to cover the semiconductor layer;

stacking a fourth conductive layer having a light-transmitting property and a fifth conductive layer over the insulating layer;

forming a third mask over the fifth conductive layer;

etching the fourth conductive layer to form a third electrode and etching the fifth conductive layer to form a sixth conductive layer, by using the third mask;

recessing the third mask to form a fourth mask; and

etching the sixth conductive layer by using the fourth mask to form a second wiring.