TOUCH PANEL, TFT-LCD ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF

• US 20100225609A1
• Filed: 03/04/2010
• Published: 09/09/2010
• Est. Priority Date: 03/04/2009
• Status: Active Grant

• Current Assignee: Beijing BOE Optoelectronics Technology Co Ltd. (BOE Technology Group Co., Ltd.)
• Original Assignee: Beijing BOE Optoelectronics Technology Co Ltd. (BOE Technology Group Co., Ltd.)
• Inventors: WANG, Zheng, HUANG, Yinglong
• Granted Patent: US 8,681,089 B2
• Time in Patent Office: Days
• US Class Current: 345/173
• CPC Class Codes: G02F 1/13338 Input devices, e.g. touch panels
• CPC Class Codes: G06F 3/0412 Digitisers structurally integrated in a display
• CPC Class Codes: G06F 3/0445 using two or more layers of sensing electrodes, e.g. using two layers of electrodes separated by a dielectric layer
• CPC Class Codes: H01L 27/1214 comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 27/1259 Multistep manufacturing methods
• CPC Class Codes: H01L 27/1288 employing particular masking sequences or specially adapted masks, e.g. half-tone mask

Abstract

A touch display comprising a first substrate formed with a common electrode; a second substrate formed with a gate line and a data line, wherein a first thin film transistor and a pixel electrode is provided in a pixel region defined by the gate line and the data line and the pixel region and the common electrode form a liquid crystal capacitor; a touch element provided in the pixel region in the second substrate and used to sense a touch voltage reflecting the change of the liquid crystal capacitance at a touch point; and a touch processing device connected with the touch element and used to obtaining a position coordinates of the touch point according to the touch voltage.

Claims

1. A touch display comprising:

a first substrate formed with a common electrode;

a second substrate formed with a gate line and a data line, wherein a first thin film transistor and a pixel electrode is provided in a pixel region defined by the gate line and the data line and the pixel region and the common electrode form a liquid crystal capacitor;

a touch element provided in the pixel region in the second substrate and used to sense a touch voltage reflecting the change of the liquid crystal capacitance at a touch point; and

a touch processing device connected with the touch element and used to obtaining a position coordinates of the touch point according to the touch voltage.

2. The touch display of claim 1, wherein, the touch element comprises:

a power supply line parallel with the data line and used to provide an operation voltage;

a signal line parallel with the data line and used to send the touch voltage to the touch processing device;

a second thin film transistor connected with the power supply line and the pixel electrode, respectively and used to sense voltage change of the pixel electrode caused by liquid crystal capacitance change at the touch point and generate the touch voltage reflecting the voltage change of the pixel electrode; and

a third thin film transistor connected with the signal line and the second thin film transistor and used to send the touch voltage to the signal line.

3. The touch display of claim 2, wherein,

the second thin film transistor comprises a second gate electrode, a second source electrode and a second drain electrode, wherein the second gate electrode is connected with the pixel electrode so that the ON state degree of the second thin film transistor is changed by the voltage change of the pixel electrode, the second source electrode is connected with the power supply line, and an operation capacitor is provided between the second drain electrode and the second gate electrode so that an operating voltage provided from the power supply line is stored in the operation capacitor and the touch voltage that is changed with the ON state degree of the second thin film transistor is generated;

and

the third thin film transistor comprises a third gate electrode, a third source electrode and a third drain electrode, wherein the third source electrode is connected with the gate line, the third source electrode is connected with the signal line, and the third drain electrode is connected with the second drain electrode so that the touch voltage is sent to the signal line.

4. The touch display of claim 1, wherein, the touch processing device comprises:

an acquisition module connected with the signal line and used to collect the touch voltage from the signal line,

a judgment module connected with the acquisition module and used to compare the touch voltage with a reference voltage which is predetermined and generate a touch signal in the case where the difference between the touch voltage and the reference voltage is larger than a predetermined threshold voltage, and

a processing module connected with the judgment modules and used to determine the position coordinates of the touch point according to a column number of the signal line and a row number of the gate line corresponding to the touch signal.

5. The touch display of claim 2, wherein, the touch processing device comprises:

an acquisition module being connected with the signal line and used to collect the touch voltage from the signal line,

a judgment module being connected with the acquisition module and used to compare the touch voltage and a reference voltage which is predetermined and generate a touch signal in the case where the difference between the touch voltage and the reference voltage is larger than a predetermined threshold voltage, and

a processing module being connected with the judgment modules and used to determine the position coordinates of the touch point according to column number of the signal line and the row number of the gate line corresponding to the touch signal.

6. A thin film transistor liquid crystal display (TFT-LCD) array substrate comprising a gate line, a data line and a power supply line and a signal line formed on a substrate,

wherein, the gate line and the data line define a pixel region, and a pixel electrode, a first thin film transistor, a second thin film transistor and a third thin film transistor are formed in the pixel region, and

wherein, the first thin film transistor is used to provide a data voltage to the pixel electrode, the second thin film transistor is used to generate a touch voltage reflecting the change of the liquid crystal capacitance at a touch point, and the third thin film transistor is used to send the touch voltage to the signal line.

7. The TFT-LCD array substrate of claim 6, wherein,

the first thin film transistor comprises a first gate electrode, a first source electrode and a first drain electrode, and the first gate electrode is connected with the gate line, the first source electrode is connected with the data line, and the first drain electrode is connected with the pixel electrode, so that the data voltage over the data line is capable of being provided to the pixel electrode though the first thin film transistor.

8. The TFT-LCD array substrate of claim 7, wherein,

the first gate electrode is formed on the substrate;

a gate insulating layer is formed on the first gate electrode;

a first active layer, comprising a stack of a semiconductor layer and a doped semiconductor layer, is formed on the gate insulating layer;

the first source electrode is formed on the first active layer with one end of the first source electrode being located above the first gate electrode and the other end thereof being connected with the data line;

the first drain electrode is formed on the first active layer with one end of the drain electrode being located above the first gate electrode and the other thereof being connected with the first drain electrode of the first thin film transistor;

a first TFT channel region is formed between the first source electrode and the first drain electrode with the doped semiconductor layer being completely removed and the semiconductor layer being partially etched in a thickness direction in the first TFT channel region so that the semiconductor layer in the first TFT channel region is exposed;

a passivation layer is formed on the data line, the first source electrode, the first drain electrode and the first TFT channel region; and

a third through hole, by which the first drain electrode and the pixel electrode are connected, is provided in the passivation layer.

9. The TFT-LCD array substrate of claim 6, wherein,

the second thin film transistor comprises a second gate electrode, a second source electrode and a second drain electrode, the second gate electrode is connected with the pixel electrode so that the ON state degree of the second thin film transistor is capable of being changed by voltage change of the pixel electrode caused by liquid crystal capacitance change at the touch point, the second source electrode is connected with the power supply line, and an operation capacitor is provided between the second drain electrode and the second gate electrode so that an operating voltage provided from the power supply line is stored in the operation capacitor and the touch voltage that is changed with the ON state degree of the second thin film transistor is generated.

10. The TFT-LCD array substrate of claim 9, wherein,

the second gate electrode is formed on the substrate and connected with the first drain electrode of the first thin film transistor;

the gate insulating layer is formed on the second gate electrode;

the second active layer, comprising the stack of the semiconductor layer and the doped semiconductor layer, is formed on the gate insulating layer;

the second source electrode is formed on the second active layer with one end of the second source electrode being located above the second gate electrode and the other end thereof being connected with the power supply line;

the second drain electrode are formed on the second active layer with one end of the drain electrode being located above the second gate electrode and opposite to the second source electrode;

the second TFT channel region is formed between the second source electrode and the second drain electrode with the doped semiconductor being completely etched away and the semiconductor layer being partially etched in the thickness direction in the second TFT channel region so that the second semiconductor layer in the TFT channel region is exposed; and

the passivation layer is formed on the power supply line, the second source electrode, the second drain electrode and the second TFT channel region.

11. The TFT-LCD array substrate of claim 6, wherein,

the third thin film transistor comprises a third gate electrode, a third source electrode and a third drain electrode, the third source electrode is connected with the gate line, the third source electrode is connected with the signal line, and the third drain electrode is connected with the second drain electrode and sends the touch voltage to the signal line.

12. The TFT-LCD array substrate of claim 11, wherein,

the third gate electrode is formed on the substrate and connected with the gate line;

the gate insulating layer is formed on the third gate electrode;

the third active layer, comprising the stack of the semiconductor layer and the doped semiconductor layer, is formed on the gate insulating layer;

the third source electrode is formed on the third active layer with one end of the third source electrode being located above the third gate electrode and the other thereof connected with the signal line;

the third drain electrode is formed on the third active layer with one end of the third drain electrode being located above the third gate electrode and the other end thereof connected with the second drain electrode of the second thin film transistor;

the third TFT channel region is formed between the third source electrode and the third drain electrode with the doped semiconductor layer being completely etched away and the semiconductor layer being partially etched in the thickness direction in the region so that the semiconductor layer in the region is exposed; and

the passivation layer is formed on the signal line, the third source electrode, the third electrode and the third TFT channel region.

13. The TFT-LCD array substrate of claim 6, wherein,

the first drain electrode of the first thin film transistor is connected with the second gate electrode of the second thin film transistor via the first connecting electrode, the second connecting electrode and the third connecting electrode.

14. The TFT-LCD array substrate of claim 13, wherein,

the first connecting electrode and the second gate electrode are provided in the same layer and connected with each other, and a first through hole is formed through the gate insulating layer and the passivation layer above the first connecting electrode;

the second connecting electrode and the first drain electrode are provided in the same layer and connected with each other, and a second through hole is formed through the passivation layer above the second connecting electrode; and

the third connecting electrode is connected with the first connecting electrode and the second connecting electrode via the first through hole and the second through hole.

15. A manufacturing method of a liquid crystal display (TFT-LCD) array substrate comprises,

Step 1, depositing a gate metal film on a substrate, forming a gate line, a common electrode line, a first gate electrode, a second gate electrode, a third gate electrode and a first connecting electrode, wherein the first gate electrode and the third gate electrode are connecting with the gate line, and the second gate electrode is connected with the first connecting electrode;

Step 2, depositing a gate insulating layer, a semiconductor film, a doped semiconductor film and a source/drain metal film on the substrate after step 1, forming a data line, a power supply line, a signal line, a first active layer, a first source electrode, a first drain electrode, a first TFT channel region, a second active layer, a second source electrode, a second drain electrode, a second TFT channel region, a third active layer, a third source electrode, a third drain electrode, a third TFT channel region and a second connecting electrode by a patterning process, wherein the first drain electrode is connected with the second connecting electrode and the second drain electrode is connected with the third drain electrode;

Step 3, depositing a passivation layer on the substrate after step 2, and forming a first through hole, a second through hole and a third though hole, wherein the first through hole is located above the first connecting electrode, the second through hole is located above the second connecting electrode, and the third though hole is located above the first drain electrode; and

Step 4, depositing a transparent conductive film on the substrate after step 3, forming a pixel electrode and a third connecting electrode, wherein the pixel electrode is connected with the first drain electrode via the third through hole and the third connecting electrode is connected with the first connecting electrode and the second connecting electrode via the first through hole and the second through hole, respectively.

16. The manufacturing method of the TFT-LCD array substrate of claim 15, wherein, the step 2 comprises,

depositing the gate insulating layer, the semiconductor layer and the doped semiconductor layer sequentially on the substrate after Step 1 by a plasma enhanced chemical vapor deposition;

depositing the source/drain metal by a magnetic sputtering or thermal evaporation method on the substrate after the above step;

applying a layer of photoresist on the source/drain metal film;

exposing the photoresist with a half tone or grey tone mask so as to form a photoresist-completely-remained region, a photoresist-completely-removed region and a photoresist-partially-remained region, wherein the photoresist-completely-remained region corresponds to a region in which the data line, the power supply line, the signal line, the first source electrode, the first drain electrode, the second source electrode, the second drain electrode, the third source electrode, the third drain electrode and the second connecting electrode are located, the photoresist-partially-remained region corresponds to a region in which the first TFT channel region, the second TFT channel region and the third TFT channel region are located, and the photoresist-completely-removed region corresponds to a region other than the above-mentioned regions;

after developing, the thickness of the photoresist in the photoresist-completely-remained region remains unchanged, the photoresist in the photoresist-completely-removed region is removed completely, and the thickness of the photoresist in the photoresist-partially-remained region is decreased;

etching away the source/drain metal film, the doped semiconductor film and the semiconductor film in the photoresist-completely-removed region by a first etching process so as to form the first active layer, the second active layer, the third active layer, the data line, the power supply line and the signal line;

removing the photoresist in the photoresist-partially-remained region by an ashing process so as to expose the source/drain metal film;

etching away the source/drain metal film and the doped semiconductor film and partially etching the semiconductor film in the photoresist-partially-remained by a second etching process so as to expose the semiconductor film in the region and form the first source electrode, the first drain electrode, the first TFT channel region, the second source electrode, the second drain electrode, the second TFT channel region, the third source electrode, the third drain electrode, the third TFT channel region and the second connecting electrode; and

removing the remained photoresist.

17. The manufacturing method of the TFT-LCD array substrate of claim 15, wherein, the step 2 comprises,

depositing the gate insulating layer, the semiconductor film and the doped semiconductor film sequentially by a plasma enhanced chemical vapor deposition method on the substrate after Step 1;

forming the first active layer, the second active layer and the third active layer by a patterning process with a normal mask;

depositing the source/drain metal film on the substrate after the above steps by a magnetic sputtering or thermal evaporation method; and

forming the data line, the power supply line, the signal line, the first source electrode, the first drain electrode, the first TFT channel region, the second source electrode, the second drain electrode, the second TFT channel region, the third source electrode, the third drain electrode, the third TFT channel region and the second connecting electrode by a patterning process with a normal mask.