SYSTEMS AND METHODS FOR OPERATING A DISPLAY

• US 20100225657A1
• Filed: 03/06/2009
• Published: 09/09/2010
• Est. Priority Date: 03/06/2009
• Status: Active Grant

• Current Assignee: Apple Inc.
• Original Assignee: Apple Inc.
• Inventors: Yao, Wei H., Sakariya, Kapil V.
• Granted Patent: US 8,508,542 B2
• Time in Patent Office: Days
• US Class Current: 345/545
• CPC Class Codes: G09G 2310/027 Details of drivers for data electrodes, the drivers handling digital grey scale data, e.g. use of D/A converters
• CPC Class Codes: G09G 2320/103 Detection of image changes, e.g. determination of an index representative of the image change
• CPC Class Codes: G09G 2330/021 Power management, e.g. power saving
• CPC Class Codes: G09G 2360/18 Use of a frame buffer in a display terminal, inclusive of the display panel
• CPC Class Codes: G09G 2370/08 Details of image data interface between the display device controller and the data line driver circuit
• CPC Class Codes: G09G 3/20 for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
• CPC Class Codes: G09G 3/3688 suitable for active matrices only

Abstract

Embodiments of the electronic device include a display driver with the ability to receive image data in a streaming display mode or a frame-buffered display mode. In some embodiments, the electronic device may switch seamlessly between the two display modes based on which display mode will provide reduced power usage given the type and/or variability of the image data being received.

Claims

1. An electronic device, comprising:

a processor operative to generate image data; and

a display communicatively coupled to the processor and operative to receive the image data from the processor and display an image based on the image data received from the processor, wherein the processor and the display are configured to operate in a streaming mode and a frame-buffered mode, and wherein the processor and the display are configured to switch alternatively between the streaming mode and the frame-buffered mode.

2. The electronic device of claim 1, wherein the processor and the display are configured to switch between the streaming mode and the frame-buffered mode based on the type of image being displayed.

3. The electronic device of claim 1, wherein the processor and the display are configured to switch between the frame-buffered mode and the streaming mode based on a rate of transmission of the image data to the display.

4. The electronic device of claim 1, wherein the processor and the display are configured to switch from the frame-buffered mode to the streaming mode if a variability of the image data exceeds a specified percentage of pixels per frame.

5. The electronic device of claim 1, comprising a single data bus configured to send memory-addressed image data or streaming image data from the processor to the display alternatively.

6. The electronic device of claim 1, comprising a first data bus configured to send streaming image data from the processor to the display during the streaming mode, and a second data bus configured to send memory-addressed image data from the processor to the display during the frame-buffered mode.

7. The electronic device of claim 6, wherein the processor is configured to activate the first bus or the second bus alternatively.

8. A display comprising:

a display panel comprising a matrix of pixels configured receive image signals; and

a driver configured to receive image data from a processor and send corresponding image signals to the display panel, wherein the driver is configured to receive the image data from the processor in a streaming mode and a frame-buffered mode and the driver is configured to switch between the streaming mode and the frame-buffered mode.

9. The display of claim 8, wherein the driver comprises a first interface configured to receive streaming image data from the processor, a second interface configured to receive memory-addressed image data from the processor, and a memory configured to receive the memory-addressed image data from the second interface.

10. The display of claim 8, wherein the first interface is configured to send image signals to the display panel and simultaneously copy the streaming image data to the memory.

11. The display of claim 8, wherein the driver comprises control logic configured to receive a command from the processor to switch between the streaming mode and the frame-buffered mode.

12. The display of claim 11, wherein the control logic is configured to send a confirmation signal to the processor indicating that the driver is ready to receive the streaming image data or memory-addressed image data.

13. The display of claim 12, wherein the control logic is configured to power down the frame memory while operating in the streaming mode.

14. A method of operating an electronic device, comprising:

receiving memory-addressed image data from a processor;

storing the memory-addressed image data to a frame memory;

sending image signals corresponding to the memory-addressed image data stored in the frame memory to a display panel; and

receiving a command from the processor to switch to a streaming display mode.

15. The method of claim 14, comprising:

sending a last frame of the image signals to the display panel in response to the command;

sending a confirmation signal to the processor indicating a readiness to switch to the streaming display mode; and

receiving streaming image data from the processor.

16. The method of claim 15, comprising powering down the frame memory after sending the last frame of the image signals to the display panel.

17. A method, comprising:

receiving streaming image data from a processor;

sending image signals corresponding to the streaming image data to a display panel; and

receiving a command from the processor to switch to a frame-buffered display mode.

18. The method of claim 17, comprising:

copying the streaming image data to a frame memory in response to the command while continuing to send the image signals corresponding to the streaming image data to the display panel;

sending a confirmation signal to the processor after substantially filling the frame memory, the confirmation signal indicating a readiness to switch to the frame-buffered display mode;

receiving the memory-addressed image data from the processor; and

storing the memory-addressed image data to a frame memory.

19. The method of claim 18, comprising sending image signals corresponding to the memory-addressed image data stored in the frame memory to a display panel.

20. A method, comprising:

receiving image data from a processor in a first display mode;

sending the image data received in the first display mode to a display panel;

receiving a command from the processor to switch to a second display mode;

receiving the image data from the processor in the second display mode; and

sending the image data received in the second display mode to the display panel;

wherein one of the first display mode and the second display mode comprises a frame-buffered display mode and one of the first display mode and the second display mode comprises a streaming display mode.

21. The method of claim 20, comprising sending a confirmation signal to the processor to indicate a readiness to begin receiving the image data from the processor in the second display mode

22. The method of claim 20, wherein the command from the processor to switch to the second display mode is based on a degree of variability of the image data.

23. The method of claim 20, wherein the command from the processor to switch to the second display mode is triggered based on a first average power usage corresponding with the first display mode being higher than a second average power usage corresponding with the second display mode.