ENCRYPTION/DECRYPTION DEVICE, ENCRYPTION/DECRYPTION METHOD, AND COMPUTER PROGRAM

• US 20100226493A1
• Filed: 01/04/2007
• Published: 09/09/2010
• Est. Priority Date: 01/17/2006
• Status: Active Grant

• Current Assignee: Sony Corporation (Sony Group Corp.)
• Original Assignee: Sony Corporation (Sony Group Corp.)
• Inventors: Shibutani, Kyoji, Shirai, Taizo
• Granted Patent: US 8,073,140 B2
• Time in Patent Office: Days
• US Class Current: 380/28
• CPC Class Codes: H04L 2209/122 Hardware reduction or efficient architectures
• CPC Class Codes: H04L 9/002 Countermeasures against attacks on cryptographic mechanisms network architectures or network communication protocols for protection against malicious traffic H04L63/1441
• CPC Class Codes: H04L 9/0625 with splitting of the data block into left and right halves, e.g. Feistel based algorithms, DES, FEAL, IDEA or KASUMI

Abstract

It is possible to realize a Feistel-type common key block encryption/decryption processing configuration capable of reducing data stored in a memory at a low cost. The Feistel-type common key block encryption/decryption processing repeatedly executes an SP-type F function having nonlinear and linear transform sections by several rounds. At least one of the nonlinear and linear transform processes executed in the F function in each round is executed as a transform process identical with a transform process applied to an encryption/decryption algorithm other than a Feistel-type common key block encryption/decryption algorithm and/or another hash function such as AES and Whirlpool. With this configuration, it is possible to reduce the design cost and the amount of data stored in a memory.

Claims

1. An encryption/decryption processing device comprising

an encryption/decryption processing section configured to carry out Feistel-type common key block encryption/decryption processing repeating an SP-type F function used in execution of data transform processing including nonlinear and linear transform processes in a plurality of rounds, wherein

said encryption/decryption processing section is configured to carry out at least one of transform processings of the nonlinear and linear transform processes applying the F function executed in the rounds as a transform process identical with a transform process applying an encryption/decryption algorithm other than the algorithm of said Feistel-type common key block encryption/decryption processing or applying another hash function.

2. The encryption/decryption processing device according to claim 1, wherein

said encryption/decryption processing section is configured to selectively apply at least two or more matrixes different from each other to the linear transform process carried out in the rounds and at least one of the selected matrixes is a matrix applied to the encryption/decryption algorithm other than the algorithm of said Feistel-type common key block encryption/decryption or the other hash function.

3. The encryption/decryption processing device according to claim 2, wherein

said encryption/decryption processing section is configured to selectively apply two matrixes M₀ and M₁ different from each other to the linear transform process carried out in the rounds in such a way that the order of application of the two matrixes M₀ and M₁ different from each other satisfies the following conditions (a) and (b):

(a) M₀ is followed by M₁ in a sequence of the odd-numbered rounds;

(b) M₀ is followed by M₁ in a direction starting from the last stage in the sequence of the even-numbered rounds.

4. The encryption/decryption processing device according to claim 2, wherein

said encryption/decryption processing section is configured to selectively apply three matrixes M₀, M₁ and M₂ different from each other to the linear transform process carried out in the rounds in such a way that the order of application of the three matrixes M₀, M₁ and M₂ different from each other satisfies the following conditions (a) and (b):

(a) M₀ is followed by M₁ to be followed by M₂ in a sequence of the odd-numbered rounds;

(b) M₀ is followed by M₁ to be followed by M₂ in a direction starting from the last stage in the sequence of the even-numbered rounds.

5. The encryption/decryption processing device according to claim 1, wherein:

said encryption/decryption processing section is configured to carry out 64-bit Feistel-type common key block encryption/decryption processing; and

at least one of matrixes selected as matrixes to be used in the linear transform process carried out in the rounds is a matrix applied to an AES encryption/decryption algorithm.

6. The encryption/decryption processing device according to claim 5, wherein said encryption/decryption processing section is configured to selectively implement the algorithms of both the AES encryption/decryption processing and the 64-bit Feistel-type common key block encryption/decryption processing.

7. The encryption/decryption processing device according to claim 1 wherein:

said encryption/decryption processing section is configured to carry out 128-bit Feistel-type common key block encryption/decryption processing; and

at least one of matrixes selected as matrixes to be used in the linear transform process carried out in the rounds is a matrix applied to a Whirlpool hash function.

8. The encryption/decryption processing device according to claim 7, wherein

said encryption/decryption processing section is configured to selectively implement the algorithms of both the Whirlpool hash function and the 128-bit Feistel-type common key block encryption/decryption processing.

9. An encryption/decryption processing method comprising

an encryption/decryption processing step of carrying out Feistel-type common key block encryption/decryption processing repeating an SP-type F function used in execution of data transform processing including nonlinear and linear transform processes in a plurality of rounds, wherein

said encryption/decryption processing step is executed to carry out at least one of the transform processing of the nonlinear and linear transform processes applying the F function executed in the rounds as a transform process identical with a transform process applying an encryption/decryption algorithm other than the algorithm of said Feistel-type common key block encryption/decryption or another hash function.

10. The encryption/decryption processing method according to claim 9, wherein

said encryption/decryption processing step is executed to selectively apply at least two or more matrixes different from each other to the linear transform process carried out in the rounds and at least one of the selected matrixes is a matrix applied to the encryption/decryption algorithm other than the algorithm of said Feistel-type common key block encryption/decryption or the other hash function.

11. The encryption/decryption processing method according to claim 10, wherein

said encryption/decryption processing step is executed to selectively apply two matrixes M₀ and M₁ different from each other to said linear transform process carried out in the rounds in such a way that the order of application of the two matrixes M₀ and M₁ satisfies the following conditions (a) and (b):

(a) M₀ is followed by M₁ in a sequence of the odd-numbered rounds;

(b) M₀ is followed by M₁ in a direction starting from the last stage in the sequence of the even-numbered rounds.

12. The encryption/decryption processing method according to claim 10, wherein

said encryption/decryption processing step is executed to selectively apply three matrixes M₀, M₁ and M₂ different from each other to the linear transform process carried out in the rounds in such a way that the order of application of the three matrixes M₀, M₁ and M₂ satisfies the following conditions (a) and (b):

(a) M₀ is followed by M₁ to be followed by M₂ in a sequence of the odd-numbered rounds;

(b) M₀ is followed by M₁ to be followed by M₂ in a direction starting from the last stage in the sequence of the even-numbered rounds.

13. The encryption/decryption processing method according to claim 9, wherein:

said encryption/decryption processing step is a step of carrying out 64-bit Feistel-type common key block encryption/decryption processing; and

at least one of matrixes selected as matrixes to be used in the linear transform process carried out in the rounds is a matrix applied to an AES encryption/decryption algorithm.

14. The encryption/decryption processing method according to claim 9, wherein:

said encryption/decryption processing step is a step of carrying out 128-bit Feistel-type common key block encryption/decryption processing; and

at least one of matrixes selected as matrixes to be used in the linear transform process carried out in the rounds is a matrix applied to a Whirlpool hash function.

15. A computer program for driving an encryption/decryption processing device to carry out encryption/decryption processing, said computer program comprising

an encryption/decryption processing step of carrying out Feistel-type common key block encryption/decryption processing repeating an SP-type F function used in execution of data transform processing including nonlinear and linear transform processes in a plurality of rounds as a step for being executed in an encryption/decryption processing section, wherein

said encryption/decryption processing step is a step of carrying out at least one of the nonlinear and linear transform processes applying the F function executed in the rounds as a transform process identical with a transform process applying an encryption/decryption algorithm other than the algorithm of said Feistel-type common key block encryption/decryption or another hash function.