Digital readout method and apparatus

• US 20100226495A1
• Filed: 10/29/2007
• Published: 09/09/2010
• Est. Priority Date: 10/29/2007
• Status: Abandoned Application

• Current Assignee: Massachusetts Institute of Technology
• Original Assignee: Massachusetts Institute of Technology
• Inventors: Berger, Robert, Kelly, Michael, Wey, James, Colonero, Curtis, Tyrrell, Brian, Mooney, Daniel, Schultz, Kenneth, Candell, Lawrence
• Application Number:
  US11/978,351
• Publication Number:
  US 20100226495A1
• Time in Patent Office: Days
• US Class Current: 380/30
• CPC Class Codes: G06F 21/602 Providing cryptographic facilities or services
• CPC Class Codes: G09C 1/00 Apparatus or methods whereby a given sequence of signs, e.g. an intelligible text, is transformed into an unintelligible sequence of signs by transposing the signs or groups of signs or by replacing them by others according to a predetermined system cryptographic typewriters G09C3/00
• CPC Class Codes: G11B 20/00086 Circuits for prevention of unauthorised reproduction or copying, e.g. piracy indicating unauthorised use of record carriers in general G11B23/28; scrambling for television signal recording H04N5/913; network architectures or network protocols for network security H04L63/00; cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
• CPC Class Codes: G11B 20/0021 involving encryption or decryption of contents recorded on or reproduced from a record carrier
• CPC Class Codes: H04L 2209/12 Details relating to cryptographic hardware or logic circuitry
• CPC Class Codes: H04L 2209/805 Lightweight hardware, e.g. radio-frequency identification [RFID] or sensor
• CPC Class Codes: H04L 9/0631 Substitution permutation network [SPN], i.e. cipher composed of a number of stages or rounds each involving linear and nonlinear transformations, e.g. AES algorithms
• CPC Class Codes: H04L 9/0637 Modes of operation, e.g. cipher block chaining [CBC], electronic codebook [ECB] or Galois/counter mode [GCM]
• CPC Class Codes: H04L 9/12 Transmitting and receiving encryption devices synchronised or initially set up in a particular manner
• CPC Class Codes: H04N 2005/91364 the video signal being scrambled
• CPC Class Codes: H04N 21/4223 Cameras H04N23/00 takes precedence
• CPC Class Codes: H04N 21/4408 involving video stream encryption, e.g. re-encrypting a decrypted video stream for redistribution in a home network
• CPC Class Codes: H04N 23/20 for generating image signals from infrared radiation only
• CPC Class Codes: H04N 25/57 Control of the dynamic range
• CPC Class Codes: H04N 25/707 Pixels for event detection
• CPC Class Codes: H04N 25/75 Circuitry for providing, modifying or processing image signals from the pixel array
• CPC Class Codes: H04N 25/77 Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components
• CPC Class Codes: H04N 25/772 comprising A/D, V/T, V/F, I/T or I/F converters
• CPC Class Codes: H04N 5/33 Transforming infrared radiation cameras or camera modules for generating image signals from infrared radiation H04N23/20; circuitry of SSIS for transforming infrared radiation into image signals H04N25/20
• CPC Class Codes: H04N 5/772 the recording apparatus and the television camera being placed in the same enclosure
• CPC Class Codes: H04N 5/913 : for scrambling ; for copy protection

Abstract

A digital focal plane array includes an all-digital readout integrated circuit in combination with a detector array. The readout circuit includes unit cell electronics, orthogonal transfer structures, and data handling structures. The unit cell electronics include an analog to digital converter. Orthogonal transfer structures enable the orthogonal transfer of data among the unit cells. Data handling structures may be configured to operate the digital focal plane array as a data encryptor/decipherer. Data encrypted and deciphered by the digital focal plane array need not be image data.

Claims

1. An encryption system comprising:

a plurality of analog-to-digital converters (ADC) wherein the ADCs are arranged in a two-dimensional array and each ADC within the array is capable of autonomously converting analog input signals to digital output signals, the array further configured for orthogonal transfer of data among the ADCs, and timing and control electronics configured to control the ADC array and to thereby encrypt data located within the ADCs of the array.

2. The encryption system of claim 1 further comprising a decipher key generator configured to modify data within the ADCs of the array.

3. The encryption system of claim 1 wherein the array is configured to implement a public key encryption.

4. The encryption system of claim 3 wherein the array is configured to implement a PGP encryption.

5. The encryption system of claim 1 wherein each ADC in the array includes a linear feedback shift register configured to count input signals and thereby convert the input signal from analog to digital form.

6. The encryption system of claim 5 wherein the encryption system is configured to implement a stream cipher encryption.

7. The encryption system of claim 1 further comprising a sensor array coupled to the ADC array, wherein the encryption system is configured to encrypt data gathered by the sensor array.

8. The encryption system of claim 7 wherein the sensor array is a light sensor array and the encryption system is configured to encrypt image data.

9. The encryption system of claim 7 wherein the system is configured to encrypt communications data in an optical communications system.

10. The encryption system of claim 1 wherein the key is predetermined.

11. The encryption system of claim 10 where the encrypted data is formatted in a combination of header and encrypted data.

12. The encryption system of claim 11 wherein the header includes a predetermined encryption key.

13. The encryption system of claim 7 wherein the sensor array is an electrical sensor array.

14. The encryption system of claim 13 wherein the sensor array is configured to encrypt communications data received through the sensor array.