MULTI-FRAME TEST SIGNALS MODULATED BY DIGITAL SIGNAL COMPRISING SOURCE FOR TESTING ANALOG INTEGRATED CIRCUITS

• US 20100228515A1
• Filed: 03/06/2009
• Published: 09/09/2010
• Est. Priority Date: 03/06/2009
• Status: Abandoned Application

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments, Inc.
• Inventors: TAENZLER, FRIEDRICH J., SRINIVASAN, GANESH P.
• Application Number:
  US12/399,687
• Publication Number:
  US 20100228515A1
• Time in Patent Office: Days
• US Class Current: 702/124
• CPC Class Codes: H04L 1/24 Testing correct operation

Abstract

A method of generating multi-frame test signals, a testing apparatus, and method for testing integrated circuits (ICs) with the multi-frame test signals. An analog source generates an analog source signal at a constant power and a constant frequency that is modulated with a first modulating signal (e.g., I) to output a first test signal having first signal parameters including a power level, a frequency and a modulation scheme. The modulating is repeated with a second modulating signal (e.g., Q) to output a second test signal having second signal parameters including a power level, a frequency and a modulation scheme. At least one of the first and second signal parameters are different. The modulating signals are generated by a digital signal source. The first and second test signal are combined by placing the first test signal on the first frame (frame 1) and the second test signal on the second frame (frame 2) of the multi-frame test signal.

Claims

1. A method of generating multi-frame test signals for testing integrated circuits (ICs), comprising:

providing an analog source for generating an analog source signal, said analog source signal maintained at a constant power and a constant frequency;

modulating said analog source signal with a first modulating signal to output a first test signal having first signal parameters comprising a first power level, a first frequency and a first modulation scheme; and

repeating said modulating with a second modulating signal to output a second test signal having second signal parameters comprising a second power level, a second frequency and a second modulation scheme, at least one of said second signal parameters being different as compared to said first signal parameters;

wherein said first modulating signal and said second modulating signal are both generated by a digital signal comprising source comprising a waveform memory, and

combining said first test signal and said second test signal on a first and a second frame of a multi-frame test signal comprising a plurality of frames, wherein said first test signal is positioned in said first frame and said second test signal is positioned in said second frame.

2. The method of claim 1, wherein a power level of said first test signal and said second test signal are different, said power levels being controlled by said first and second modulating signals.

3. The method of claim 1, wherein said multi-frame test signal comprises a power sweeping signal monotonically increasing with successive ones of said plurality of frames.

4. The method of claim 3, wherein pairs of adjacent frames of said plurality of frames comprise a CW frame and a modulated frame that both have a common power level.

5. The method of claim 1, wherein said digital signal comprising source comprises an arbitrary waveform generators (AWG), arbitrary function generator (AFG) or data or pattern generator (DG).

6. The method of claim 1, wherein said plurality of frames comprise at least one CW frame and at least one modulated frame.

7. The method of claim 6, wherein said first modulating signal comprises a DC signal having a voltage amplitude for controlling a power level of said CW frame, and said second modulating signal comprises an IQ signal comprising an I and a Q signal, wherein a peak-to-peak voltage amplitude of said IQ signal controls a power level of said modulated frame.

8. The method of claim 6, wherein said first modulating signal comprises a complex modulation signal for controlling a power level of said CW frame, and said second modulating signal comprises an IQ signal comprising an I and a Q signal, wherein a peak-to-peak voltage amplitude of said IQ signal controls a power level of said modulated frame.

9. A method of testing an analog integrated circuit (IC), comprising:

coupling a multi-frame test signal to said analog IC, said multi-frame test signal comprising;

a plurality of frames, wherein a first test signal having first parameters comprising a first power level, a first frequency and a first modulation scheme and a second test signal having second parameters comprising a second power level, a second frequency and a second modulation scheme are provided on a first and a second frame of said plurality of frames, respectively, and wherein at least one of said second parameters are different as compared to said first parameters, and

measuring a first output signal responsive to said first test signal and a second output signal responsive to said second test signal from said analog IC, and

calculating at least one parameter for said analog IC using said first and said second output signals.

10. The method of claim 9, further comprising triggering said coupling and said measuring for synchronization.

11. The method of claim 9, wherein said first and said second power level are different, said first and said second power levels being controlled by a first and a second modulating signal, respectively.

12. The method of claim 9, wherein multi-frame test signal comprises a power sweeping signal monotonically increasing with successive ones of said plurality of frames.

13. The method of claim 9, wherein pairs of adjacent frames of said plurality of frames comprise a CW frame and a modulated frame that both have a common power level.

14. The method of claim 9, wherein said multi-frame test signal is generated by a digital signal comprising source that comprises an arbitrary waveform generators (AWG), arbitrary function generator (AFG), or data or pattern generator (DG).

15. The method of claim 9, wherein said plurality of frames comprise at least one CW frame and at least one modulated frame.

16. The method of claim 15, wherein said multi-frame test signal is generated by:

providing an analog source for generating an analog source signal, said analog source signal maintained at a constant power and a constant frequency;

modulating said analog source signal with a first modulating signal to output said first test; and

repeating said modulating with a second modulating signal to output said second test signal;

wherein said first modulating signal and said second modulating signal are both generated by a digital signal comprising source comprising a waveform memory, and

combining said first test signal and said second test signal on said first and said second frame of said multi-frame test signal.

17. The method of claim 16, wherein said first modulating signal comprises a DC signal having a voltage amplitude for controlling a power level of said CW frame, and said second modulating signal comprises an IQ signal comprising an I and a Q signal, wherein a peak-to-peak voltage amplitude of said IQ signal controls a power level of said modulated frame.

18. The method of claim 16, wherein said first modulating signal comprises a complex modulation signal for controlling a power level of said CW frame, and said second modulating signal comprises an IQ signal comprising an I and a Q signal, wherein a peak-to-peak voltage amplitude of said IQ signal controls a power level of said modulated frame.

19. The method of claim 9, wherein said measuring comprises obtaining a plurality of measurements in at least one of said plurality of frames, said calculating comprising averaging said plurality of measurements to calculate said parameter.

20. A testing apparatus for testing an analog integrated circuit (IC), comprising:

a first testing module for generating and supplying multi-frame test signals to said analog IC;

a second testing module for measuring output signals from said analog IC, wherein coupling a multi-frame test signal to said analog IC,

wherein said multi-frame test signal comprises a plurality of frames, including a first test signal having first parameters comprising a first power level, a first frequency and a first modulation scheme and a second test signal having second parameters comprising a second power level, a second frequency and a second modulation scheme are provided on a first and a second frame of said plurality of frames, respectively, wherein at least one of said second parameters are different as compared to said first parameters.

21. The apparatus of claim 20, wherein said multi-frame test signal is generated by:

an analog source for generating an analog source signal, said analog source signal maintained at a constant power and a constant frequency;

a modulator for modulating said analog source signal with a first modulating signal to output said first test signal, and modulating said analog source signal with a second modulating signal to output said second test signal,

further comprising a digital signal comprising source comprising a waveform memory for generating said first modulating signal and said second modulating signal are both generated by a digital signal comprising source, and

a combiner for combining said first test signal and said second test signal on said first and said second frame of said multi-frame test signal.

22. The apparatus of claim 21, wherein said digital signal comprising source comprises an arbitrary waveform generators (AWG), arbitrary function generator (AFG), or a data pattern generator (DG).

23. The apparatus of claim 21, wherein said plurality of frames comprise at least one CW frame and at least one modulated frame.

24. The apparatus of claim 23, wherein said first modulating signal comprises a DC signal having a voltage amplitude for controlling a power level of said CW frame, and said second modulating signal comprises an IQ signal comprising an I and a Q signal, wherein a peak-to-peak voltage amplitude of said IQ signal controls a power level of said modulated frame.

25. The apparatus of claim 23, wherein said first modulating signal comprises a complex modulation signal for controlling a power level of said CW frame, and said second modulating signal comprises an IQ signal comprising an I and a Q signal, wherein a peak-to-peak voltage amplitude of said IQ signal controls a power level of said modulated frame.

26. The apparatus of claim 21, further comprising triggering circuitry for generating a triggering signal, said triggering signal coupled to said first testing module and said second testing module.