EMBEDDED ELECTRONIC DEVICE AND METHOD FOR STORING DATA

• US 20100229068A1
• Filed: 06/16/2009
• Published: 09/09/2010
• Est. Priority Date: 03/03/2009
• Status: Active Grant

• Current Assignee: Wistron Corporation
• Original Assignee: Wistron Corporation
• Inventors: Yang, Yao-Kun, Lin, Po-Chih
• Granted Patent: US 8,271,854 B2
• Time in Patent Office: Days
• US Class Current: 714/752
• CPC Class Codes: G06F 11/1068 in sector programmable memories, e.g. flash disk G06F11/1072 takes precedence
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 2212/7209 Validity control, e.g. using flags, time stamps or sequence numbers
• CPC Class Codes: G11C 16/10 Programming or data input circuits
• CPC Class Codes: G11C 2029/0411 Online error correction
• CPC Class Codes: G11C 29/74 using duplex memories, i.e. using dual copies
• CPC Class Codes: H03M 13/11 using multiple parity bits

Abstract

An embedded electronic device is provided. The embedded electronic device comprises a flash memory and a processor. The flash memory comprises a plurality of data storage blocks. The processor performs a parity check process to determine parity data of operation system (OS) data, wherein the parity data serves as a backup for the operation system (OS) data. The processor stores the operation system (OS) data and corresponding parity data into the data storage block of the flash memory.

Claims

1. An electronic device, comprising:

a flash memory, comprising a plurality of data storage blocks; and

a processor, wherein;

the processor divides operation system data into a plurality of data block sets, each of which comprises at least one data block, and data amount stored in the data block equals to data amount stored in the data storage block;

the processor performs a parity check process on the data blocks within each of the data block sets to generate parity data of the corresponding data block, and the parity data is used as backup for the operation system data; and

the processor stores the operation system data and the parity data into the data storage block of the flash memory.

2. The electronic device of claim 1, wherein the processor further determines a number of data blocks within each of the data block sets according to the following equation:

N=[(A/B)],

wherein N, an integer, is a number of data blocks within the data block set, A is a number of data blocks consisting of the operation system data, and B is a number of data storage blocks available for storing the parity data.

3. The electronic device of claim 1, wherein the processor further performs XOR calculation on data stored in each of the data blocks within each of the data block sets to generate the parity data for the corresponding data block set.

4. The electronic device of claim 1, further comprising a random access memory, wherein the processor further performs the following steps when executing the operation system data:

determining whether the flash memory is damaged in the data storage block storing the operation system data;

if the flash memory is damaged in the data storage block storing the operation system data, retrieving the parity data corresponding to the data block of the operation system data stored in the damaged data storage block;

restoring operation system data that is meant to be stored in the damaged data storage block according to the retrieved parity data; and

loading the restored operation system data into the random access memory.

5. The electronic device of claim 4, wherein the processor further executes the restored operation system data loaded into the random access memory.

6. The electronic device of claim 4, wherein the processor further rewrites the restored operation system data loaded into the random access memory into undamaged data storage blocks within the flash memory to repair the operation system data stored in the damaged data storage block.

7. The electronic device of claim 6, wherein the processor further deletes the parity data after the operation system data loaded into the random access memory has been rewritten into the flash memory.

8. A method for storing data, implemented in an embedded electronic device equipped with a flash memory, wherein the flash memory comprises a plurality of data storage blocks, comprising:

providing operation system data, wherein the operation system data comprises a plurality of data block sets, each of which comprises at least one data block, and data amount stored in the data block equals to data amount stored in the data storage block;

performing a parity check process on the data blocks within each of the data block sets to generate parity data of the corresponding data block, wherein the parity data is used as a backup for the operation system data; and

storing the operation system data and the parity data into the data storage block of the flash memory.

9. The method of claim 8, further determining a number of data blocks within each of the data block sets according to the following equation:

N=[(A/B)],

wherein N, an integer, is a number of data blocks within the data block set;

A is a number of data blocks consisting of the operation system data; and

B is a number of data storage blocks available for storing the parity data.

10. The method of claim 8, further performing XOR calculation on data stored in each of the data blocks within each of the data block sets to generate the parity data for the corresponding data block set.

11. The method of claim 8, wherein the embedded electronic device further comprises a random access memory, the method further performs the following steps when executing the operation system data:

determining whether the flash memory is damaged in the data storage block storing the operation system data;

if the flash memory is damaged in the data storage block storing the operation system data, retrieving the parity data corresponding to the data block of the operation system data stored in the damaged data storage block;

restoring operation system data that is meant to be stored in the damaged data storage block according to the retrieved parity data; and

loading the restored operation system data into the random access memory.

12. The method of claim 10, further executing the restored operation system data loaded into the random access memory.

13. The method of claim 10, further rewriting the restored operation system data loaded into the random access memory into undamaged data storage blocks within the flash memory to repair the operation system data stored in the damaged data storage block.

14. The method of claim 13, further deleting the parity data after the operation system data loaded into the random access memory has been rewritten into the flash memory.