ELECTRONIC DEVICE PACKAGE AND METHOD FOR FORMING THE SAME

• US 20100230803A1
• Filed: 03/11/2010
• Published: 09/16/2010
• Est. Priority Date: 03/13/2009
• Status: Active Grant

• Current Assignee: Xintec Incorporated
• Original Assignee: Xintec Incorporated
• Inventors: CHIEN, Wen-Cheng, Chang, Shu-Ming, Ni, Ching-Yu
• Granted Patent: US 8,367,477 B2
• Time in Patent Office: Days
• US Class Current: 257/693
• CPC Class Codes: B05D 1/36 Successively applying liquids or other fluent materials, e.g. without intermediate treatment
• CPC Class Codes: B81B 2207/096 through the substrate
• CPC Class Codes: B81C 1/00301 Connecting electric signal lines from the MEMS device with external electrical signal lines, e.g. through vias
• CPC Class Codes: H01L 21/56 Encapsulations, e.g. encapsulation layers, coatings
• CPC Class Codes: H01L 21/6835 using temporarily an auxiliary support
• CPC Class Codes: H01L 2224/04105 Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
• CPC Class Codes: H01L 2224/12105 Bump connectors formed on an encapsulation of the semiconductor or solid-state body, e.g. bumps on chip-scale packages
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/73267 Layer and HDI connectors
• CPC Class Codes: H01L 2224/92244 the second connecting process involving a build-up interconnect
• CPC Class Codes: H01L 24/19 Manufacturing methods of high density interconnect preforms
• CPC Class Codes: H01L 24/24 of an individual high density interconnect connector
• CPC Class Codes: H01L 24/82 by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI] interconnection structure between a plurality of semiconductor chips H01L23/5389
• CPC Class Codes: H01L 27/14618 Containers
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/01078 Platinum [Pt]
• CPC Class Codes: H01L 2924/12041 LED
• CPC Class Codes: H01L 2924/12042 LASER
• CPC Class Codes: H01L 2924/1461 MEMS
• CPC Class Codes: H01L 2924/15153 the die mounting substrate comprising a recess for hosting the device
• CPC Class Codes: H01L 2924/15311 : being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/18162 : of a chip with build-up interconnect
• CPC Class Codes: H01L 31/02002 : Arrangements for conducting electric current to or from the device in operations
• CPC Class Codes: H01L 31/0203 : Containers; Encapsulations , e.g. encapsulation of photodiodesfor photovoltaic devices H01L31/048; for organic photosensitive devices H10K30/80
• CPC Class Codes: H01L 33/486 : adapted for surface mounting

Abstract

An embodiment of the invention provides a method for forming an electronic device package, which includes providing a carrier substrate having an upper surface and an opposite lower surface; forming a cavity from the upper surface of the carrier substrate; disposing an electronic device having a conducting electrode in the cavity; forming a filling layer in the cavity, wherein the filling layer surround the electronic device; thinning the carrier substrate from the lower surface to a predetermined thickness; forming at least a through-hole in the electronic device or the in the carrier substrate; and forming a conducting layer over a sidewall of the through-hole, wherein the conducting layer electrically connects to the conducting electrode.

Claims

1. A method for forming an electronic device package, comprising:

providing a carrier substrate having an upper surface and an opposite lower surface;

forming a cavity from the upper surface of the carrier substrate;

disposing an electronic device having a conducting electrode in the cavity;

forming a filling layer in the cavity, wherein the filling layer surrounds the electronic device;

thinning the carrier substrate from the lower surface to a predetermined thickness;

forming at least a through-hole in the electronic device or in the carrier substrate; and

forming a conducting layer over a sidewall of the through-hole, wherein the conducting layer electrically connects to the conducting electrode.

2. The method for forming an electronic device package as claimed in claim 1, further comprising thinning the carrier substrate from the lower surface to a predetermined thickness to expose a portion of the electronic device and a lower surface of the carrier substrate.

3. The method for forming an electronic device package as claimed in claim 2, wherein the through-hole is located underlying the conducting electrode of the electronic device.

4. The method for forming an electronic device package as claimed in claim 1, further comprising forming a redistribution layer overlying the filling layer, wherein the redistribution layer electrically connects to the conducting electrode and extends over the upper surface, and wherein the through-hole is located in the carrier substrate and a bottom portion of the through-hole exposes a portion of the redistribution layer.

5. The method for forming an electronic device package as claimed in claim 1, wherein before forming the conducting layer, the method further comprises forming an insulating layer over the sidewall and a bottom portion of the through-hole and forming a first opening in the insulating layer, wherein the first opening exposes the conducting electrode.

6. The method for forming an electronic device package as claimed in claim 1, wherein the carrier substrate is a wafer, and before thinning the carrier substrate from the lower surface, the method further comprises fixing the upper surface of the carrier substrate on a recyclable temporary substrate.

7. The method for forming an electronic device package as claimed in claim 6, wherein the upper surface of the carrier substrate is fixed on the recyclable temporary substrate by a removable adhesive layer, and after the forming of the conducting layer, the method further comprises removing the recyclable temporary substrate, wherein the removing the recyclable temporary substrate comprises:

cutting through the carrier substrate to the removable adhesive layer along a scribe line; and

removing the recyclable temporary substrate to obtain a plurality of electronic device packages and recycling the recyclable temporary substrate.

8. The method for forming an electronic device package as claimed in claim 1, further comprising forming an upper package layer by directly curing a liquid state material on the electronic device, there is no adhesive between the upper package layer and the electronic device, and the upper package layer directly cured from the liquid state material has a substantially planar upper surface and a transmittance of more than about 90%.

9. An electronic device package, comprising:

a carrier substrate having at least an opening extending from an upper surface of the carrier substrate toward an opposite lower surface;

a filling layer located in the opening;

an electronic device located in the opening and surrounded by the filling layer, wherein the electronic device has a conducting electrode;

at least a through-hole located in the electronic device or in the carrier substrate; and

a conducting layer overlying a sidewall of the through-hole and electrically connected to the conducting electrode.

10. The electronic device package as claimed in claim 9, wherein the opening penetrates from the upper surface of the carrier substrate to the lower surface.

11. The electronic device package as claimed in claim 10, wherein the through-hole is located in the electronic device and a bottom portion of the through-hole exposes the conducting electrode.

12. The electronic device package as claimed in claim 9, further comprising an insulating layer between the sidewall of the through-hole and the conducting layer.

13. The electronic device package as claimed in claim 9, further comprising a passivation layer overlying the lower surface and the conducting layer.

14. The electronic device package as claimed in claim 9, further comprising an upper package layer covering the electronic device, wherein the upper package layer is formed by directly curing a liquid state material on the electronic device, there is no adhesive between the upper package layer and the electronic device, and the upper package layer directly cured from the liquid state material has a substantially planar upper surface and a transmittance of more than about 90%.

15. The electronic device package as claimed in claim 9, further comprising a redistribution layer overlying the filling layer and the upper surface, and electrically connected to the conducting electrode, wherein the through-hole is located in the carrier substrate and penetrates through the upper surface and the lower surface, and a bottom portion of the through-hole exposes a portion of the redistribution layer.