METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

• US 20100233847A1
• Filed: 03/09/2010
• Published: 09/16/2010
• Est. Priority Date: 03/12/2009
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: SASAKI, Toshinari, OHARA, Hiroki
• Granted Patent: US 8,993,386 B2
• Time in Patent Office: Days
• US Class Current: 438/104
• CPC Class Codes: C01G 15/006 Compounds containing, besides gallium, indium, or thallium, two or more other elements, with the exception of oxygen or hydrogen
• CPC Class Codes: C01G 45/006 Compounds containing, besides manganese, two or more other elements, with the exception of oxygen or hydrogen manganates, manganites or permanganates C01G45/12
• CPC Class Codes: C01G 49/009 Compounds containing, besides iron, two or more other elements, with the exception of oxygen or hydrogen
• CPC Class Codes: C01G 51/006 Compounds containing, besides cobalt, two or more other elements, with the exception of oxygen or hydrogen cobaltates C01G51/40
• CPC Class Codes: C01G 53/006 Compounds containing, besides nickel, two or more other elements, with the exception of oxygen or hydrogen nickelates C01G53/40
• CPC Class Codes: C01P 2002/52 containing elements as dopants
• CPC Class Codes: C01P 2006/40 Electric properties
• CPC Class Codes: H01L 21/02164 the material being a silicon oxide, e.g. SiO2
• CPC Class Codes: H01L 21/02178 the material containing aluminium, e.g. Al2O3
• CPC Class Codes: H01L 21/02183 the material containing tantalum, e.g. Ta2O5
• CPC Class Codes: H01L 21/02266 deposition by physical ablation of a target, e.g. sputtering, reactive sputtering, physical vapour deposition or pulsed laser deposition
• CPC Class Codes: H01L 21/02554 Oxides
• CPC Class Codes: H01L 21/02565 Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
• CPC Class Codes: H01L 21/02631 Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
• CPC Class Codes: H01L 21/441 Deposition of conductive or insulating materials for electrodes
• CPC Class Codes: H01L 21/477 Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering H01L21/38 - H01L21/449 and H01L21/461 - H01L21/475 take precedence
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 29/66742 Thin film unipolar transistors
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

An object is to provide a semiconductor device including a semiconductor element which has favorable characteristics. A manufacturing method of the present invention includes the steps of: forming a first conductive layer which functions as a gate electrode over a substrate; forming a first insulating layer to cover the first conductive layer; forming a semiconductor layer over the first insulating layer so that part of the semiconductor layer overlaps with the first conductive layer; forming a second conductive layer to be electrically connected to the semiconductor layer; forming a second insulating layer to cover the semiconductor layer and the second conductive layer; forming a third conductive layer to be electrically connected to the second conductive layer; performing first heat treatment after forming the semiconductor layer and before forming the second insulating layer; and performing second heat treatment after forming the second insulating layer.

Claims

1. A manufacturing method of a semiconductor device comprising the steps of:

forming a first conductive layer which functions as a gate electrode over a substrate;

forming a first insulating layer to cover the first conductive layer;

forming a semiconductor layer over the first insulating layer so that part of the semiconductor layer overlaps with the first conductive layer;

forming a second conductive layer over the semiconductor layer;

forming a second insulating layer to cover the semiconductor layer and the second conductive layer;

forming a third conductive layer connected to the second conductive layer;

performing a first heat treatment after the step of forming the semiconductor layer and before the step of forming the second insulating layer; and

performing a second heat treatment after the step of forming the second insulating layer.

2. The manufacturing method of a semiconductor device according to claim 1,

wherein an oxide semiconductor layer containing indium, gallium, and zinc is formed as the semiconductor layer.

3. The manufacturing method of a semiconductor device according to claim 1,

wherein the semiconductor layer comprises an oxide semiconductor material,

wherein the oxide semiconductor material is represented by InMO₃(ZnO)_m (m>

0), and

wherein M denotes one or more of metal elements selected from gallium (Ga), iron (Fe), nickel (Ni), manganese (Mn), and cobalt (Co).

4. The manufacturing method of a semiconductor device according to claim 3,

wherein M of InMO₃(ZnO)_m denotes gallium (Ga).

5. The manufacturing method of a semiconductor device according to claim 1,

wherein a hydrogen concentration in the semiconductor layer is higher than a hydrogen concentration in the second insulating layer, and

wherein a nitrogen concentration in the semiconductor layer is higher than a nitrogen concentration in the second insulating layer.

6. The manufacturing method of a semiconductor device according to claim 1,

wherein a hydrogen concentration in the second insulating layer is 1×

10²¹ atoms/cm³ or lower, and

wherein a nitrogen concentration in the second insulating layer is 1×

10¹⁹ atoms/cm³ or lower.

7. The manufacturing method of a semiconductor device according to claim 1,

wherein the semiconductor layer and the second conductive layer are connected at least at a part of upper surface of the semiconductor layer formed the second insulating layer.

8. The manufacturing method of a semiconductor device according to claim 1,

wherein the semiconductor layer and the second conductive layer are connected at least at a part of bottom surface of the semiconductor layer formed the first insulating layer.

9. The manufacturing method of a semiconductor device according to claim 1,

wherein the semiconductor layer and the second conductive layer are electrically connected each other.

10. The manufacturing method of a semiconductor device according to claim 1,

wherein the first heat treatment is performed after the step of forming the second conductive layer and before the step of forming the second insulating layer.

11. The manufacturing method of a semiconductor device according to claim 1,

wherein the second heat treatment is performed after the step of forming the third conductive layer.

12. The manufacturing method of a semiconductor device according to claim 1,

wherein a heat treatment temperature of the first heat treatment and a heat treatment temperature of the second heat treatment are 400°

C. or lower.