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JTAG Mailbox

  • US 20100235698A1
  • Filed: 03/05/2010
  • Published: 09/16/2010
  • Est. Priority Date: 03/12/2009
  • Status: Active Grant
First Claim
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1. An electronic device comprising:

  • a processing stage having a JTAG port with a test data input pin (TDI), a test data output pin (TDO), a test mode select pin (TMS) and a test clock pin (TCK);

    a test access port (TAP) controller having a data register (DR) shift state and an instruction register shift (IR) state; and

    wherein said electronic device is operable in a scan event mode to automatically map an incoming event to said TDO pin.

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