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High Threshold Voltage NMOS Transistors For Low Power IC Technology

  • US 20100237425A1
  • Filed: 03/19/2010
  • Published: 09/23/2010
  • Est. Priority Date: 03/20/2009
  • Status: Active Grant
First Claim
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1. An integrated circuit includinga plurality of transistors of benchmark design of a first conductivity type and including an out-diffusion sink for impurities in a semiconductor material of said transistors of benchmark design, andat least one transistor of said first conductivity type exhibiting reduced leakage and increased threshold voltage compared with said transistors of benchmark design,wherein a total impurity dose in a transistor of said benchmark design and in said out-diffusion sink adjacent said transistor of benchmark design and an impurity dose in an impurity implant of said at least one transistor are substantially equal.

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