INTEGRATED CIRCUIT PACKAGING SYSTEM WITH AN INTERPOSER AND METHOD OF MANUFACTURE THEREOF

• US 20100237483A1
• Filed: 03/20/2009
• Published: 09/23/2010
• Est. Priority Date: 03/20/2009
• Status: Active Grant

• Current Assignee: Stats Chippac Pte. Lte.
• Original Assignee: Stats Chippac BVI limited (JCET Group Co., Ltd.)
• Inventors: Lee, Taewoo, Cho, NamJu, Chi, HeeJo
• Granted Patent: US 8,624,370 B2
• Time in Patent Office: Days
• US Class Current: 257/686
• CPC Class Codes: H01L 21/565 Moulds
• CPC Class Codes: H01L 2224/05001 Internal layers
• CPC Class Codes: H01L 2224/05008 Bonding area integrally formed with a redistribution layer on the semiconductor or solid-state body, e.g.
• CPC Class Codes: H01L 2224/05024 the internal layer being disposed on a redistribution layer on the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/05099 Material
• CPC Class Codes: H01L 2224/0557 the external layer being disposed on a via connection of the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/05571 the external layer being disposed in a recess of the surface
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/16145 the bodies being stacked
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/32145 the bodies being stacked
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/73203 Bump and layer connectors
• CPC Class Codes: H01L 2224/73204 the bump connector being embedded into the layer connector
• CPC Class Codes: H01L 2224/73207 Bump and wire connectors
• CPC Class Codes: H01L 2224/73253 Bump and layer connectors
• CPC Class Codes: H01L 2225/06513 Bump or bump-like direct electrical connections between devices, e.g. flip-chip connection, solder bumps
• CPC Class Codes: H01L 2225/06527 Special adaptation of electrical connections, e.g. rewiring, engineering changes, pressure contacts, layout
• CPC Class Codes: H01L 2225/06541 Conductive via connections through the device, e.g. vertical interconnects, through silicon via [TSV] manufacturing via connections per se H01L21/76898
• CPC Class Codes: H01L 2225/1023 the support being an insulating substrate
• CPC Class Codes: H01L 2225/1041 : Special adaptations for top connections of the lowermost container, e.g. redistribution layer, integral interposer
• CPC Class Codes: H01L 2225/1058 : Bump or bump-like electrical connections, e.g. balls, pillars, posts
• CPC Class Codes: H01L 2225/1094 : Thermal management, e.g. cooling
• CPC Class Codes: H01L 23/13 : characterised by the shape
• CPC Class Codes: H01L 23/3128 : the substrate having spherical bumps for external connection
• CPC Class Codes: H01L 23/49816 : Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
• CPC Class Codes: H01L 23/49827 : Via connections through the substrates, e.g. pins going through the substrate, coaxial cables H01L23/49822, H01L23/49833, H01L23/4985, H01L23/49861 take precedence
• CPC Class Codes: H01L 23/49833 : the chip support structure consisting of a plurality of insulating substrates
• CPC Class Codes: H01L 23/50 : for integrated circuit devices, e.g. power bus, number of leadsH01L23/482 - H01L23/498 take precedence
• CPC Class Codes: H01L 23/552 : Protection against radiation, e.g. light or electromagnetic waves
• CPC Class Codes: H01L 24/05 : of an individual bonding area
• CPC Class Codes: H01L 25/0657 : Stacked arrangements of devices
• CPC Class Codes: H01L 25/105 : the devices being of a type provided for in group H01L27/00
• CPC Class Codes: H01L 25/50 : Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00 H01L21/50 takes precedence
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 : Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/15311 : being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/19041 : being a capacitor
• CPC Class Codes: H01L 2924/19104 : on the semiconductor or solid-state device, i.e. passive-on-chip
• CPC Class Codes: H01L 2924/19105 : in a side-by-side arrangement on a common die mounting substrate
• CPC Class Codes: H01L 2924/19107 : off-chip wires
• CPC Class Codes: H01L 2924/3025 : Electromagnetic shielding
• CPC Class Codes: H01L 2924/3511 : Warping

Abstract

A method of manufacture of an integrated circuit packaging system includes: mounting a device over an integrated circuit having a through via; attaching an interposer, having an opening, and the integrated circuit with the device within the opening; and forming an encapsulation at least partially covering the integrated circuit and the interposer facing the integrated circuit.

Claims

1. A method of manufacture of an integrated circuit packaging system comprising:

mounting a device over an integrated circuit having a through via;

attaching an interposer, having an opening, and the integrated circuit with the device within the opening; and

forming an encapsulation at least partially covering the integrated circuit and the interposer facing the integrated circuit.

2. The method as claimed in claim 1 further comprising:

providing the integrated circuit having an interposer side with the interposer side having active circuitry thereon; and

wherein attaching the interposer, having the opening, and the integrated circuit includes;

attaching the interposer with the interposer side facing the interposer.

3. The method as claimed in claim 1 further comprising:

providing the integrated circuit having a non-interposer side with the non-interposer side having active circuitry thereon; and

wherein attaching the interposer, having the opening, and the integrated circuit includes;

attaching the interposer with the non-interposer side facing away from the interposer.

4. The method as claimed in claim 1 further comprising mounting a component over the integrated circuit for configuring the integrated circuit and the device with the component.

5. The method as claimed in claim 1 further comprising connecting an attachment structure to the integrated circuit, the interposer, and the device.

6. A method of manufacture of an integrated circuit packaging system comprising:

mounting a device over an integrated circuit having a through via;

connecting an interposer, having an opening, and the integrated circuit with the device within the opening;

connecting an attachment structure to the integrated circuit, the interposer, the device, or any combination thereof; and

forming an encapsulation at least partially covering the integrated circuit and the interposer facing the integrated circuit.

7. The method as claimed in claim 6 wherein forming the encapsulation includes covering the device with the encapsulation planar with the integrated circuit.

8. The method as claimed in claim 6 further comprising attaching a conductive structure, having a slot to the interposer and the device with the slot exposing the interposer.

9. The method as claimed in claim 6 further comprising stacking a mountable circuit over the interposer.

10. The method as claimed in claim 6 wherein mounting the device over the integrated circuit includes mounting a flip-chip.

11. An integrated circuit packaging system comprising:

an integrated circuit having a through via;

a device mounted over the integrated circuit;

an interposer, having an opening, attached to the integrated circuit with the device within the opening; and

an encapsulation at least partially covering the integrated circuit and the interposer facing the integrated circuit.

12. The system as claimed in claim 11 wherein the integrated circuit includes an interposer side with the interposer side having active circuitry thereon and the interposer side facing the interposer.

13. The system as claimed in claim 11 wherein the integrated circuit includes a non-interposer side with the non-interposer side having active circuitry thereon and the non-interposer side facing away from the interposer.

14. The system as claimed in claim 11 further comprising a component mounted over the integrated circuit for configuring the integrated circuit and the device with the component.

15. The system as claimed in claim 11 further comprising an attachment structure connected to the integrated circuit, the interposer, and the device.

16. The system as claimed in claim 11 further comprising:

a redistribution layer over the integrated circuit;

an underfill between the device and the redistribution layer; and

wherein;

the device is mounted over the redistribution layer.

17. The system as claimed in claim 16 wherein the encapsulation covers the device with the encapsulation planar with the integrated circuit.

18. The system as claimed in claim 16 further comprising a conductive structure, having a slot, attached to the interposer and the device with the slot exposing the interposer.

19. The system as claimed in claim 16 further comprising a mountable circuit stacked over the interposer.

20. Thee system as claimed in claim 16 wherein the device over the integrated circuit includes a flip-chip.