AUTOMATED WAFER DEFECT INSPECTION SYSTEM AND A PROCESS OF PERFORMING SUCH INSPECTION

• US 20100239157A1
• Filed: 05/28/2010
• Published: 09/23/2010
• Est. Priority Date: 07/15/1998
• Status: Active Grant

• Current Assignee: Rudolph Technologies Incorporated (Onto Innovation Inc.)
• Original Assignee: Rudolph Technologies Incorporated (Onto Innovation Inc.)
• Inventors: Watkins, Cory, O'Dell, Jeffrey, Verburgt, Thomas, Harless, Mark
• Granted Patent: US 9,337,071 B2
• Time in Patent Office: Days
• US Class Current: 382/145
• CPC Class Codes: G01N 2021/8838 Stroboscopic illumination; synchronised illumination
• CPC Class Codes: G01N 21/8803 Visual inspection measuring projectors G01B9/08
• CPC Class Codes: G01N 21/8806 Specially adapted optical and illumination features
• CPC Class Codes: G01N 21/9501 Semiconductor wafers manufacturing processes per se of semiconductor devices implementing a measuring step H01L22/10
• CPC Class Codes: G01N 2201/06113 Coherent sources; lasers
• CPC Class Codes: G01N 2201/0696 Pulsed
• CPC Class Codes: G01N 2201/0697 Pulsed lasers
• CPC Class Codes: G01N 2201/12 Circuits of general importance; Signal processing
• CPC Class Codes: G06T 2207/30148 Semiconductor; IC; Wafer
• CPC Class Codes: G06T 7/0004 Industrial image inspection
• CPC Class Codes: H01L 21/67242 Apparatus for monitoring, sorting or marking testing or measuring during manufacture H01L22/00, marks per se H01L23/544; testing individual semiconductor devices G01R31/26
• CPC Class Codes: H01L 21/67271 Sorting devices
• CPC Class Codes: H01L 21/67288 Monitoring of warpage, curvature, damage, defects or the like
• CPC Class Codes: H01L 22/12 for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions electrical measurement of diffusions H01L22/14
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H04N 23/56 provided with illuminating means

Abstract

An automated defect inspection system has been invented and is used on patterned wafers, whole wafers, broken wafers, partial wafers, sawn wafers such as on film frames, JEDEC trays, Auer boats, die in gel or waffle packs, MCMs, etc., and is specifically intended and designed for second optical wafer inspection for such defects as metalization defects (such as scratches, voids, corrosion, and bridging), diffusion defects, passivation layer defects, scribing defects, glassivation defects, chips and cracks from sawing, solder bump defects, and bond pad area defects.

Claims

1. An automated system for inspecting a substrate such as a wafer in any form including whole patterned wafers, sawn wafers, broken wafers, and wafers of any kind on film frames, dies, die in gel paks, die in waffle paks, multi-chip modules often called MCMs, JEDEC trays, Auer boats, and other wafer and die package configurations for defects, the system comprising:

a wafer test plate;

a wafer provider for providing a wafer to the test plate;

a visual inspection device for visual inputting of a plurality of known good quality wafers during training and for visual inspection of other unknown quality wafers during inspection;

an illuminator for providing short pulses of light to each of the unknown quality wafers during movement between the wafer and the visual inspection device; and

a microprocessor having processing and memory capabilities for developing a model of good quality wafer and comparing unknown quality wafers to the model.

2. The automated system of claim 1, wherein the visual inspection device is configured to capture still images of each of the unknown quality wafers during continuous movement between the wafer and the visual inspection device.

3. The automated system of claim 2, wherein the short pulses of light are synchronized with the capturing of the still images.

4. The automated system of claim 1, wherein the illuminator is configured to provide the short pulses of light based on a velocity of the movement.

5. The automated system of claim 1, wherein the illuminator is configured to provide the short pulses of light at a sequence correlating to a velocity of the movement.

6. The automated system of claim 1, wherein the illuminator comprises a brightfield illuminator positioned approximately above the wafer test plate.

7. The automated system of claim 1, wherein the illuminator comprises a darkfield illuminator positioned approximately above the wafer test plate.

8. The automated system of claim 1, wherein the illuminator comprises at least one darkfield laser positioned approximately about a periphery of the wafer test plate for providing darkfield illumination at an angle of less than about six degrees to the wafer test plate.

9. An automated method of inspecting a semiconductor wafer in any form including whole patterned wafers, sawn wafers, broken wafers, and wafers of any kind of film frames, dies, die in gel paks, die in waffle paks, multi-chip modules often called MCMs, JEDEC trays, Auer boats, and other wafer and die package configurations for defects, the method comprising:

training a model as to parameters of a good wafer via optical viewing of multiple known good wafers;

illuminating unknown quality wafers with an illuminator, the illuminator configured to provide flashes of light to each of the unknown quality wafers during movement of the wafer; and

inspecting the unknown quality wafers using the model.

10. The automated method of claim 9, wherein the inspecting step comprises capturing still views of each of the unknown quality wafers during continuous movement of the wafer.

11. The automated method of claim 10, wherein the flashes of light are synchronized with the capturing of the still views.

12. The automated method of claim 9, wherein the illuminator is configured to provide the flashes of light based on a velocity of the movement.

13. The automated method of claim 9, wherein the illuminator is configured to provide the flashes of light at a sequence correlating to a velocity of the movement.

14. An automated system for inspecting a substrate such as a wafer in any form including whole patterned wafers, sawn wafers, broken wafers, and wafers of any kind on film frames, dies, die in gel paks, die in waffle paks, multi-chip modules often called MCMs, JEDEC trays, Auer boats, and other wafer and die package configurations for defects, the system comprising:

a wafer test plate;

a wafer provider for providing a wafer to the test plate;

a camera for capturing still images of a moving wafer;

an illuminator for providing strobe illumination to the moving wafer; and

a controller for comparing pixel data for unknown quality wafers to a model of a good quality wafer.

15. The automated system of claim 14, wherein the illuminator is configured to provide the strobe illumination based on a velocity of the moving wafer.

16. The automated system of claim 14, wherein the strobe illumination comprises short pulses of light at a sequence correlating to a velocity of the moving wafer.

17. The automated system of claim 14, wherein the strobe illumination is synchronized with the capturing of the still images.

18. The automated system of claim 14, wherein the illuminator comprises a brightfield illuminator positioned approximately above the wafer test plate.

19. The automated system of claim 14, wherein the illuminator comprises a darkfield illuminator positioned approximately above the wafer test plate.

20. The automated system of claim 14, wherein the illuminator comprises a set of low angle darkfield lasers positioned approximately about a periphery of the wafer test plate for providing darkfield illumination at an angle of less than about six degrees to the wafer test plate.