SEMICONDUCTOR DEVICE

• US 20100244029A1
• Filed: 03/24/2010
• Published: 09/30/2010
• Est. Priority Date: 03/27/2009
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: ABE, Takayuki, YAMAZAKI, Shunpei, SHISHIDO, Hideaki
• Granted Patent: US 9,012,918 B2
• Time in Patent Office: Days
• US Class Current: 257/52
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 29/42376 characterised by the length or the sectional shape
• CPC Class Codes: H01L 29/42384 for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
• CPC Class Codes: H01L 29/78606 with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device H01L29/78642, H01L29/78645 take precedence
• CPC Class Codes: H01L 29/78645 with multiple gate
• CPC Class Codes: H01L 29/78648 arranged on opposing sides of the channel
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H10K 59/123 Connection of the pixel electrodes to the thin film transistors [TFT]

Abstract

The threshold voltage is shifted in a negative or positive direction in some cases by an unspecified factor in a manufacturing process of the thin film transistor. If the amount of shift from 0 V is large, driving voltage is increased, which results in an increase in power consumption of a semiconductor device. Thus, a resin layer having good flatness is formed as a first protective insulating film covering the oxide semiconductor layer, and then a second protective insulating film is formed by a sputtering method or a plasma CVD method under a low power condition over the resin layer. Further, in order to adjust the threshold voltage to a desired value, gate electrodes are provided over and below an oxide semiconductor layer.

Claims

1. A semiconductor device comprising:

a first gate electrode over an insulating surface;

a first insulating layer over the first gate electrode;

an oxide semiconductor layer over the first insulating layer;

a source electrode layer and a drain electrode layer over the oxide semiconductor layer;

a resin layer which covers the source electrode layer and the drain electrode layer; and

a second gate electrode over the resin layer,

wherein the oxide semiconductor layer includes a region with a small thickness compared to a region of the oxide semiconductor layer which overlaps with the source electrode layer or the drain electrode layer, and

wherein the resin layer is in contact with the region with the small thickness of the oxide semiconductor layer.

2. The semiconductor device according to claim 1, further comprising:

a second insulating layer between the resin layer and the second gate electrode.

3. The semiconductor device according to claim 1, further comprising:

a second insulating layer over the second gate electrode.

4. The semiconductor device according to claim 1, further comprising:

a first buffer layer between the oxide semiconductor layer and the source electrode layer, and

a second buffer layer between the oxide semiconductor layer and the drain electrode layer,

5. The semiconductor device according to claim 1,

wherein the second gate electrode overlaps with the oxide semiconductor layer and the first gate electrode.

6. The semiconductor device according to claim 1,

wherein a width of the second gate electrode is larger than a width of the first gate electrode.

7. The semiconductor device according to claim 1,

wherein a width of the first gate electrode is larger than a width of the oxide semiconductor layer.

8. The semiconductor device according to claim 1, wherein the second gate electrode is in a floating state.

9. The semiconductor device according to claim 1, wherein the second gate electrode is a fixed potential of 0V.

10. The semiconductor device according to claim 1, wherein the first gate electrode and the second gate electrode have the same potential.

11. A semiconductor device comprising:

a first gate electrode over an insulating surface;

a first insulating layer over the first gate electrode;

a source electrode layer and a drain electrode layer over the first insulating layer;

an oxide semiconductor layer over the source electrode layer and the drain electrode layer;

a resin layer which covers the oxide semiconductor layer; and

a second gate electrode over the resin layer,

wherein the oxide semiconductor layer is formed over the first insulating layer and overlaps with the first gate electrode,

wherein at least a part of the oxide semiconductor layer is located between the source electrode layer and the drain electrode layer, and

wherein the second gate electrode overlaps with the oxide semiconductor layer and the first gate electrode.

12. The semiconductor device according to claim 11, further comprising:

a buffer layer between the oxide semiconductor layer and the source electrode layer and between the oxide semiconductor layer and the drain electrode layer.

13. The semiconductor device according to claim 11, further comprising:

a first buffer layer between the first insulating layer and the source electrode layer, and a second buffer layer between the first insulating layer and the drain electrode layer,

wherein a side surface of the first and second buffer layers are in contact with the oxide semiconductor layer.

14. The semiconductor device according to claim 11, further comprising:

a second insulating layer between the resin layer and the second gate electrode.

15. The semiconductor device according to claim 11, further comprising:

a second insulating layer over the second gate electrode.

16. The semiconductor device according to claim 11,

wherein a width of the second gate electrode is larger than a width of the first gate electrode.

17. The semiconductor device according to claim 11,

wherein a width of the first gate electrode is larger than a width of the oxide semiconductor layer.

18. The semiconductor device according to claim 11, wherein the second gate electrode is in a floating state.

19. The semiconductor device according to claim 11, wherein the second gate electrode is a fixed potential of 0V.

20. The semiconductor device according to claim 11, wherein the first gate electrode and the second gate electrode have the same potential.

21. A semiconductor device comprising:

a first gate electrode over an insulating surface;

a first insulating layer over the first gate electrode;

an oxide semiconductor layer over the first insulating layer;

a channel protective layer over and in contact with the oxide semiconductor layer;

a source electrode layer and a drain electrode layer over the oxide semiconductor layer;

a resin layer which covers the source electrode layer and the drain electrode layer;

a second gate electrode over the resin layer; and

a second insulating layer over the resin layer,

wherein the resin layer is in contact with the channel protective layer.

22. The semiconductor device according to claim 21,

wherein the second insulating layer is provided over and in contact with the resin layer and below the second gate electrode.

23. The semiconductor device according to claim 21,

wherein the second insulating layer is provided between the second gate electrode and the resin layer.

24. The semiconductor device according to claim 21, further comprising:

a first buffer layer and a second buffer layer which are over and in contact with the channel protective layer and the oxide semiconductor layer,

wherein the first buffer layer is provided between the oxide semiconductor layer and the source electrode layer, and the second buffer layer between the oxide semiconductor layer and the drain electrode layer.

25. The semiconductor device according to claim 21,

wherein a width of the first gate electrode is larger than a width of the channel protective layer and is smaller than a width of the second gate electrode.

26. The semiconductor device according to claim 21,

wherein a width of the second gate electrode is larger than a width of the first gate electrode.

27. The semiconductor device according to claim 21,

wherein a width of the first gate electrode is larger than a width of the oxide semiconductor layer.

28. The semiconductor device according to claim 21, wherein the second gate electrode is in a floating state.

29. The semiconductor device according to claim 21, wherein the second gate electrode is a fixed potential of 0V.

30. The semiconductor device according to claim 21, wherein the first gate electrode and the second gate electrode have the same potential.