×

METHOD AND APPARATUS FOR GATE TRAINING IN MEMORY INTERFACES

  • US 20100246290A1
  • Filed: 03/30/2009
  • Published: 09/30/2010
  • Est. Priority Date: 03/30/2009
  • Status: Active Grant
First Claim
Patent Images

1. A method for gate training in a memory interface, comprising the operations of:

  • adding a coarse delay to a gate assert time, wherein the coarse delay is a predefined period of time, and wherein the gate assert time is a time when a data strobe gate signal is asserted;

    repeatedly sampling a data strobe signal at the gate assert time until a rising edge of the data strobe signal is found, wherein a fine delay is added to the gate assert time between sampling of the data strobe signal, the fine delay being a period of time shorter than the coarse delay; and

    removing the coarse delay from the gate assert time.

View all claims
  • 2 Assignments
Timeline View
Assignment View
    ×
    ×