REDUNDANT HOST CONNECTION IN A ROUTED NETWORK

• US 20100246388A1
• Filed: 03/16/2010
• Published: 09/30/2010
• Est. Priority Date: 03/26/2009
• Status: Active Grant

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: Brocade Communications Systems, Inc. (Broadcom, Inc.)
• Inventors: Ghanwani, Anoop, Yu, Shunjia, Gupta, Somesh, Koganti, Phanidhar
• Granted Patent: US 8,665,886 B2
• Time in Patent Office: Days
• US Class Current: 370/225
• CPC Class Codes: H04L 12/4625 Single bridge functionality, e.g. connection of two networks over a single bridge
• CPC Class Codes: H04L 45/00 Routing or path finding of packets in data switching networks routing or path finding in wireless networks H04W40/00
• CPC Class Codes: H04L 45/28 using route fault recovery
• CPC Class Codes: H04L 45/48 Routing tree calculation
• CPC Class Codes: H04L 45/586 of virtual routers
• CPC Class Codes: H04L 45/66 Layer 2 routing, e.g. in Ethernet based MAN's
• CPC Class Codes: H04L 45/76 Routing in software-defined topologies, e.g. routing between virtual machines
• CPC Class Codes: H04L 49/201 Multicast operation; Broadcast operation
• CPC Class Codes: H04L 49/351 for local area network [LAN], e.g. Ethernet switches
• CPC Class Codes: H04L 49/557 Error correction, e.g. fault recovery or fault tolerance
• CPC Class Codes: H04L 49/65 Re-configuration of fast packet switches
• CPC Class Codes: H04L 49/70 Virtual switches

Abstract

One embodiment of the present invention provides a switch. The switch includes a management mechanism and a configuration mechanism. During operation, the management mechanism is configured to operate the switch in conjunction with the partner switch as a single logical switch. The configuration mechanism is configured to assign a virtual switch identifier to the logical switch.

Claims

1. A switch, comprising:

a processor;

a memory coupled to the processor and storing instructions which when executed cause the processor to;

route frames based on their Ethernet headers;

operate the switch in conjunction with a separate physical switch as a single logical switch; and

assign a virtual switch identifier to the logical switch.

2. The switch of claim 1, wherein the switch is a layer-2 switch capable of routing without requiring the network topology to be based on a spanning tree topology.

3. The switch of claim 1, wherein the switch is a routing bridge configured to operate in accordance with the Transparent Interconnection of Lots of Links (TRILL) protocol.

4. The switch of claim 1, wherein the memory further stores instructions which when executed cause the processor to set the cost of a link to the logical switch to be zero.

5. The switch of claim 1, wherein the memory further stores instructions which when executed cause the processor to mark an ingress-switch field of a frame with the virtual switch identifier, wherein the frame is received from a device coupled to the switch.

6. The switch of claim 1 wherein the memory further stores instructions which when executed cause the processor to notify the separate physical switch about the reachability of a media access control (MAC) address associated with a device coupled to both the switch and the separate physical switch.

7. The switch of claim 6, wherein the memory further stores instructions which when executed cause the processor to disassociate the device from the virtual switch upon detecting a failure of a link between the device and the separate physical switch.

8. The switch of claim 6, wherein the memory further stores instructions which when executed cause the processor to notify the separate physical switch of the failure via an inter-switch communication channel upon detecting a failure of a link between the device and the switch.

9. The switch of claim 1, wherein the memory further stores instructions which when executed cause the processor to advertise that the virtual switch is equivalent to both the switch and the separate physical switch, thereby facilitating multi-path routing to or from a device coupled to both switches.

10. The switch of claim 1, wherein the memory further stores instructions which when executed cause the processor to discard a received multicast frame corresponding to a multicast group to which a device coupled to both the switch and the separate physical switch belongs, when:

the frame'"'"'s ingress switch identifier is the same as the virtual switch identifier;

or

the frame'"'"'s ingress switch identifier is different from the virtual switch identifier and a link between the device and the switch is not a primary link.

11. The switch of claim 1, wherein the memory further stores instructions which when executed cause the processor to forward a multicast frame originated from a first local device coupled to the switch to a second local device coupled to both the switch and the separate physical switch, when the second local device is in a multicast group corresponding to the multicast frame.

12. A method, comprising:

routing frames received at a switch based on their Ethernet headers; and

configuring the switch as a single logical switch which includes one or more separate physical switches, the logical switch having a virtual switch identifier.

13. The method of claim 12, further comprising performing a layer-2 routing function without requiring the network topology to be based on a spanning tree topology.

14. The method of claim 12, further comprising performing a layer-2 routing function in accordance with the Transparent Interconnection of Lots of Links (TRILL) protocol.

15. The method of claim 12, further comprising advertising to a neighbor a zero-cost link from the switch to the logical switch.

16. The method of claim 12, further comprising placing the virtual switch identifier in the header of an ingress frame.

17. The method of claim 12, further comprising notifying a separate physical switch about the reachability of a media access control (MAC) address associated with a device coupled to the switch.

18. The method of claim 17, wherein upon detecting a failure of a link between the device and the separate physical switch, the method further comprises disassociating the device from the virtual switch.

19. The method of claim 17, wherein upon detecting a failure of a link between the device and the switch, the method further comprises notifying the separate physical switch of the failure via an inter-switch communication channel.

20. The method of claim 12, further comprising advertising that the virtual switch is equivalent to both the switch and the separate physical switch, thereby facilitating multi-path routing to or from a device coupled to both switches.

21. The method of claim 12, further comprising discarding a received multicast frame corresponding to a multicast group to which a device coupled to both the switch and the separate physical switch belongs, when:

the frame'"'"'s ingress switch identifier is the same as the virtual switch identifier;

or

the frame'"'"'s ingress switch identifier is different from the virtual switch identifier and a link between the device and the switch is not a primary link.

22. The method of claim 12, further comprising forwarding a multicast frame originated from a first local device coupled to the switch to a second local device coupled to both the switch and the separate physical switch, when the second local device is in a multicast group corresponding to the multicast frame.

23. A switch means, comprising:

a frame processing means for routing frames based on their Ethernet headers;

an inter-switch communication means for communicating with a separate physical switch;

a management means for operating the switch in conjunction with the separate physical switch as a single logical switch; and

a configuration means for assigning a virtual switch identifier to the logical switch.

24. The switch means of claim 23, further comprising a frame-marking means for marking an ingress-switch field of a frame with the virtual switch identifier, wherein the frame is received from a device coupled to the switch.