System And Method For Recruitment And Management Of Processors For High Performance Parallel Processing Using Multiple Distributed Networked Heterogeneous Computing Elements

• US 20100251259A1
• Filed: 03/31/2010
• Published: 09/30/2010
• Est. Priority Date: 03/31/2009
• Status: Abandoned Application

• Current Assignee: Massively Parallel Technologies, Inc
• Original Assignee: Massively Parallel Technologies, Inc
• Inventors: Howard, Kevin D.
• Application Number:
  US12/751,214
• Publication Number:
  US 20100251259A1
• Time in Patent Office: Days
• US Class Current: 718/105
• CPC Class Codes: G06F 9/5072 Grid computing
• CPC Class Codes: G06F 9/541 via adapters, e.g. between incompatible applications

Abstract

A parallel processing computer is described that has several processing devices of several different processing device types each communicating over a computer network. The computer has at least one conversion device in communication with the processing devices, the conversion device being a processing device having conversion code for translating at least some task allocation and other messages from a format understood by the conversion device into a format understood for execution by a particular type of the several types of the processing devices. The computer also has at least one access device in communication with the at least one conversion device, the access device having program code for allocating tasks to processing devices and generating task allocation messages to processing devices. The computer network in an embodiment involves portions of the cellular telephone network as well as part of the internet.

Claims

1. A parallel processing computer comprising:

a plurality of processing devices each comprising;

a computer network interface coupled to a processor,

a memory system, and

a power supply for providing power to the network interface, memory system, and processor;

wherein the processing devices are of at least two processing device types;

at least one conversion device in communication with the processing devices, the conversion device comprising a processing device wherein the memory system of the conversion device comprises conversion code for translating at least some task allocation messages from a format understood by the conversion device into a format understood for execution by a particular type of the at least two types of the processing devices and for relaying translated messages to processing devices; and

at least one access device in communication with the at least one conversion device, the access device comprising;

a computer network interface coupled to a processor,

a memory system, and

a power supply for providing power to the network interface, memory system, and processor;

wherein the memory system of the access device comprises program code for allocating tasks to processing devices and generating task allocation messages to processing devices.

2. The parallel processing computer of claim 1 wherein at least two of the processing devices are in communication with each other through a network, the network comprising at least part of the internet.

3. The parallel processing computer of claim 1 wherein at least two of the processing devices are in communication with each other through a network, the network comprising at least part of the cellular telephone network.

4. The parallel processing computer of claim 1 wherein the computer network interface of at least a first processing device is coupled to the cellular telephone network, and the network interface of at least a second processing device is coupled to the Internet, the first and second compute device being in communication with each other.

5. The parallel processing computer of claim 1, wherein the network interface of at least a first processing device is coupled to the cellular telephone network, wherein the first processing device periodically saves checkpoint information on other devices of the supercomputer, wherein the first processing device monitors a charger connection, and wherein the first processing device drops out of the supercomputer upon detecting removal of a charger from the charger connection.

6. The parallel processing computer of claim 1, wherein the conversion device comprises computer readable instructions for translating messages from an access device having a processor using a first instruction set and running a first operating system to a message format intelligible to a processing device having a processor configured to operate under a second instruction set and running a second operating system, the second operating system being substantially dissimilar from the first operating system.

7. The parallel processing computer of claim 1, wherein the conversion code for translating at least some task allocation messages from a format understood by the conversion device into a format understood for execution by a particular type of the at least two types of the processing devices uses a translation table having entries for each type of processing device it can convert to, and further comprises code for searching other conversion devices of the computer for an appropriate translation table entry when it contacts a processing device for which it does not have an appropriate translation table entry.

8. The parallel processing computer of claim 1 further comprising machine readable instructions for dynamically balancing load among processing devices of the computer.

9. The parallel processing computer of claim 8 wherein the instructions for dynamically balancing load and the code for allocating tasks include instructions for:

partitioning a job into work units;

estimating performance of processing devices according to processing device type;

assigning work units to processing devices according to estimated performance of the processing devices; and

tracking completion of work units by processing devices and assigning additional work units to processing devices as work units are completed.

10. The parallel processing computer of claim 9 wherein the instructions for dynamically balancing load and the code for allocating tasks include instructions for:

estimating performance of communication links between processing devices of the supercomputer;

assigning work units to processing nodes according to communications requirements of the work units and estimated performance of communications links.

11. The parallel processing computer of claim 10, wherein the instructions for dynamically balancing load include instructions for adjusting estimated performance of processing devices and communications links according to completion of work units.

12. A computer program product comprising a memory having recorded therein machine readable instructions that when executed on a computing device:

Use a network connection to search for devices capable of being part of a parallel processing supercomputer;

Upon contacting a device, determine whether that device is already part of a parallel processing supercomputer, and if so, instruct the computing device to join the supercomputer as a processing device;

Upon contacting a device that is not already part of a supercomputer, to connect to that device, determine a master of connected devices, and to instruct the master of connected devices to continue searching until devices already part of a supercomputer or capable of becoming access nodes of a supercomputer are found; and

Upon joining a parallel processing supercomputer, accepting and executing work units therefrom.

13. The computer program product of claim 12 further comprising machine readable instructions for translating between computing devices of a first type and computing devices of a second type.

14. The computer program product of claim 13 wherein computing devices of the first type are computers selected from the group consisting of desktop, laptop, and netbook computers, and computing devices of the second type are selected from the group consisting of personal digital assistants (PDAs), and enhanced cellular telephones.