MULTIPLEXED LATCHING VALVES FOR MICROFLUIDIC DEVICES AND PROCESSORS

• US 20100252123A1
• Filed: 06/18/2010
• Published: 10/07/2010
• Est. Priority Date: 03/22/2006
• Status: Active Grant

• Current Assignee: Regents of the University of California (University of California)
• Original Assignee: Regents of the University of California (University of California)
• Inventors: Jensen, Erik C., Mathies, Richard A., Grover, William H.
• Granted Patent: US 8,286,665 B2
• Time in Patent Office: Days
• US Class Current: 137/206
• CPC Class Codes: B01L 2200/12 Specific details about manufacturing devices
• CPC Class Codes: B01L 2300/0816 Cards, e.g. flat sample carriers usually with flow in two horizontal directions
• CPC Class Codes: B01L 2300/0887 Laminated structure
• CPC Class Codes: B01L 2400/0638 membrane valves, flap valves
• CPC Class Codes: B01L 3/5025 for parallel transport of multiple samples
• CPC Class Codes: B01L 3/502738 characterised by integrated valves microvalves F16K99/0001
• CPC Class Codes: F16K 2099/0071 with latching means
• CPC Class Codes: F16K 2099/0074 using photolithography, e.g. etching
• CPC Class Codes: F16K 2099/0084 Chemistry or biology, e.g. "lab-on-a-chip" technology
• CPC Class Codes: F16K 99/0001 Microvalves microdevices B81B1/00; manufacture or treatment of devices or systems in or on a substrate B81C1/00; microfluidic structures B01L3/5027; micropumps F04B19/006
• CPC Class Codes: F16K 99/0015 Diaphragm or membrane valves
• CPC Class Codes: F16K 99/0034 Operating means specially adapted for microvalves
• CPC Class Codes: F16K 99/0059 actuated by a pilot fluid
• CPC Class Codes: Y10T 137/2218 Means [e.g., valve] in control input
• CPC Class Codes: Y10T 137/3115 Gas pressure storage over or displacement of liquid
• CPC Class Codes: Y10T 137/5474 With heater
• CPC Class Codes: Y10T 137/87249 Multiple inlet with multiple outlet

Abstract

Membrane valves and latching valve structures for microfluidic devices are provided. A demultiplexer can be used to address the latching valve structures. The membrane valves and latching valve structures may be used to form pneumatic logic circuits, including processors.

Claims

1. A membrane latching valve structure comprising:

first and second input channels;

a first membrane valve having an input in fluid communication with the first input channel and a control of the first membrane valve in fluid communication with atmospheric;

a second membrane valve having an input in fluid communication with the first input channel, an output in fluid communication with an output of the first membrane valve, and a control in fluid communication with the second input channel;

a third membrane valve having a control in fluid communication with the output of the first membrane valve and the output of the second membrane valve;

such that when a sufficient vacuum is applied to the first and second input channels, the third membrane valve moves to an open position and is latched in that position when the vacuum is removed; and

such that when a sufficient pressure is applied to the first and second input channels, the third membrane valve moves to a closed position and is latched in that position when the pressure is removed.

2. The membrane latching valve structure of claim 1 wherein an input and output of the third membrane valve is configured to form an input and output of the membrane latching-valve structure.

3. The membrane latching valve structure of claim 1 wherein the second input channel, the control of the first membrane valve, the control of the second membrane valve, and the input and output of the third membrane valve are formed in a first surface.

4. The monolithic membrane latching valve of claim 3 wherein the first input channel, the input and output of the first membrane valve, the input and output of the second membrane valve, and the control of the third membrane valve are formed in a second surface opposite the first surface.

5. The monolithic membrane latching valve structure of claim 4 wherein an elastomer membrane is located between the first and second surfaces at the area of the control of the first, second and third membrane valves such that the application of a pressure or a vacuum at the first and second input channels causes the membrane to deflect to modulate a flow of a fluid through the first, second, or third membrane valve.

6. The membrane latching valve structure of claim 1 further including:

a fourth membrane valve having an input in fluid communication with the control of the third membrane valve, an output in fluid communication with the control of the first membrane valve, and a control in fluid communication with atmospheric.

7. The membrane latching valve of claims 1 wherein there are a plurality of membrane latching valve structures and further including a microfluidic demultiplexer configured to address each of the membrane latching valve structures with either a vacuum or a pressure pulse.

8. The membrane latching valve structure of claim 7 wherein the demultiplexer includes a plurality of rows of membrane valves configured to distribute the pressure and vacuum pulses to each of the membrane latching valve structures.

9. The membrane latching valve structure of claim 8 further including two pneumatic connections for each row of membrane valves of the demultiplexer.

10. The membrane latching valve structure of claim 8 wherein the demultiplexer has n- rows of membrane valves operated by n- solenoid valves to address 2n independent membrane latching valve structures.

11. The membrane latching valve structure of claim 8 wherein each row after the first row of membrane valves has twice the number of membrane valves of the previous row.

12. A membrane valve structure comprising:

a first input channel formed in a first surface of a first substrate;

a second input channel formed in a second surface of a second substrate;

a pressure valve having a control formed in the first surface and fluidly connected with atmospheric, and an input and output formed in the second surface wherein the input is fluidly connected to the second input channel;

a vacuum valve having a control formed in the first surface and fluidly connected to a first input channel, and input and an output formed in the second surface such that the input is fluidly connected to the second input channel;

a latching valve having an input and output formed in the first surface, and a control formed in the second surface such that the control is fluidly connected to the output of the vacuum valve; and

an elastomer membrane located between the first and second surfaces at the area of the control of each of the pressure, vacuum and latching valves such that the application of a pressure or a vacuum to the first and second input channels causes the membrane to deflect to modulate a flow of a fluid through the valves.

13. A microfluidic logic circuit comprising:

an array of membrane valves, each valve including a valve input, a valve output, a valve control, and an elastomer membrane wherein the application of a pressure or a vacuum can cause the membrane to deflect to modulate a flow of fluid through the valve, and wherein the membrane valves are connected in fluid communication with each other such that a pneumatic input to the array or membrane valves is logically operated upon to produce a pneumatic output.

14. The microfluidic logic circuit of claim 13 wherein the array of membrane valves includes two membrane valves configured to form an AND gate or an OR gate.

15. The microfluidic logic structure of claim 13 wherein the array of membrane valves is configured to form a NAND gate or an XOR gate.

16. The microfluidic logic circuit of claim 13 wherein the array of membrane valves is configured to form a buffer circuit.

17. The microfluidic logic circuit of claim 13 wherein the array of membrane valves is configured to form a ripple carrier adder.