HIGH VOLTAGE LOW CURRENT SURFACE EMITTING LED

• US 20100252840A1
• Filed: 06/11/2010
• Published: 10/07/2010
• Est. Priority Date: 04/06/2009
• Status: Active Grant

• Current Assignee: CREE Led Incorporated (Smart Global Holdings Incorporated)
• Original Assignee: CREE Incorporated (Wolfspeed, Inc.)
• Inventors: Heikman, Sten, IBBETSON, JAMES
• Granted Patent: US 8,476,668 B2
• Time in Patent Office: Days
• US Class Current: 257/88
• CPC Class Codes: H01L 2224/32245 the item being metallic
• CPC Class Codes: H01L 2224/32257 the layer connector connecting to a bonding area disposed in a recess of the surface of the item
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48247 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 25/0753 the devices being arranged next to each other
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 33/62 Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls

Abstract

An LED chip comprising a plurality of sub-LEDs on a submount. Electrically conductive and electrically insulating features are included that serially interconnect the sub-LEDs such that an electrical signal applied to the serially interconnected sub-LEDs along the electrically conductive features spreads to the serially interconnected sub-LEDs. A via is included that is arranged to electrically couple one of the sub-LEDs to the submount. The sub-LED can be interconnected by more than one of the conductive features, with each one of the conductive features capable of spreading an electrical signal between the two of the sub-LEDs.

Claims

1. A LED chip, comprising:

a plurality of sub-LEDs on a submount;

electrically conductive and electrically insulating features serially interconnecting said sub-LEDs such that an electrical signal applied to said serially interconnected sub-LEDs along said electrically conductive features spreads to said serially interconnected sub-LEDs; and

at least one via arranged to electrically couple at least one of said sub-LEDs to said submount.

2. The LED chip of claim 1, wherein said submount is electrically conductive, an electrical signal on said via passing through said submount.

3. The LED chip of claim 1, wherein said submount is electrically insulating, said via running through said submount.

4. The LED chip of claim 1, further comprising a wire bond pad electrically coupled to said first of said serially interconnected sub-LEDs, said via electrically coupled to the last of said serially interconnected sub-LEDs.

5. The LED chip of claim 1, wherein an electrical signal applied across the wire bond pad and said via causes said sub-LEDs to emit light.

6. The LED chip of claim 1, wherein said sub-LEDs are formed from a single junction LED.

7. The LED chip of claim 1, comprising a plurality of electrically conductive features serially interconnecting two of said sub-LEDs, each said electrically conductive feature capable of spreading said electrical signal between said two of said sub-LEDs.

8. The LED chip of claim 1, further comprising an insulator layer between said submount and said sub-LEDs.

9. The LED chip of claim 1, wherein the voltage necessary to drive said sub-LEDs is dependent on the number of said serially interconnected sub-LEDs and the junction voltage of said sub-LEDs.

10. The LED chip of claim 1, wherein the active area utilization ratio is greater than 50%.

11. The LED chip of claim 1, wherein the active area utilization ratio is greater than 75%.

12. The LED chip of claim 1, wherein said sub-LEDs are flip-chip mounted on said submount.

13. The LED chip of claim 1, wherein the alignment tolerance between said sub-LEDs is less than 5 microns.

14. The LED chip of claim 1, wherein the alignment tolerance between said sub-LEDs is less than 2 microns.

15. The LED chip of claim 1, emitting a white light from said sub-LEDs.

16. A LED chip, comprising:

a plurality of sub-LEDs mounted on a submount;

connector traces serially interconnecting said sub-LEDs;

insulating features to insulate portions of said sub-LEDs from said connector traces; and

at least one via arranged to allow for an electrical signal to pass from at least one of said sub-LEDs through said submount.

17. The LED chip of claim 16, further comprising a plurality of bottom contacts, each of which is between one of said sub-LEDs and said submount.

18. The LED chip of claim 16, further comprising a metal stack and a insulating layer arranged between said sub-LEDs and said submount, said via passing through said submount.

19. The LED chip of claim 16, wherein said submount is electrically conductive, said via electrically coupled to said submount.

20. The LED chip of claim 16, wherein said submount is electrically insulating, said via running through said submount.

21. The LED chip of claim 16, further comprising a wire bond pad electrically coupled to said first of said serially interconnected sub-LEDs, said via electrically coupled to the last of said serially interconnected sub-LEDs.

22. The LED chip of claim 16, wherein an electrical signal applied across the wire bond pad and said via causes said sub-LEDs to emit light.

23. The LED chip of claim 16, wherein an electrical signal applied across the wire bond pad and said submount causes said sub-LEDs to emit light.

24. The LED chip of claim 16, wherein at least two of said sub-LEDs is interconnected by a plurality of said connector traces.

25. A LED chip, comprising:

a plurality of sub-LEDs on a submount; and

a plurality of electrically conductive features serially interconnecting at least some of said sub-LEDs, wherein at least two of said sub-LEDs are electrically interconnected by more than one of said conductive features, each one of said conductive features capable of spreading an electrical signal between said two of said sub-LEDs.

26. The LED chip of claim 25, wherein said conductive features comprise conductive traces.

27. The LED chip of claim 25, wherein each of said conductive features is capable of spreading an electrical signal between said two of said sub-LEDs such that said sub-LEDs emit light in response to said signal.

28. The LED chip of claim 25, further comprising insulating features cooperating with said conductive features to allow said signal to spread between said two of said sub-LEDs.

29. A LED chip, comprising:

a plurality of sub-LEDs on a submount; and

a plurality of electrically conductive paths serially connecting at least some of said sub-LEDs, wherein adjacent ones of said serially connected sub-LEDs are connected by more than one of said electrically conductive paths.