Method of manufacturing semiconductor device

• US 20100255672A1
• Filed: 04/05/2010
• Published: 10/07/2010
• Est. Priority Date: 04/06/2009
• Status: Abandoned Application

• Current Assignee: Renesas Electronics Corporation
• Original Assignee: NEC Electronics Corporation (Renesas Electronics Corporation)
• Inventors: Kidokoro, Toru
• Application Number:
  US12/662,200
• Publication Number:
  US 20100255672A1
• Time in Patent Office: Days
• US Class Current: 438/594
• CPC Class Codes: H01L 29/40114 the electrodes comprising a conductor-insulator-conductor-insulator-semiconductor structure
• CPC Class Codes: H01L 29/42324 Gate electrodes for transistors with a floating gate
• CPC Class Codes: H01L 29/66825 with a floating gate H01L29/6684 takes precedence
• CPC Class Codes: H01L 29/7885 Hot carrier injection from the channel
• CPC Class Codes: H10B 41/30 characterised by the memory core region

Abstract

A method of manufacturing a semiconductor device, includes 5 steps. The first step is a step of forming a floating gate on a first surface region of a semiconductor substrate through a gate insulating film. The second step is a step of forming a tunnel insulating film so as to cover a second surface region adjacent to the first surface region and an end portion of the floating gate. The third step is a step of forming an oxide film so as to cover the tunnel insulating film and be thicker at a portion above the second surface region than at a portion above the floating gate. The fourth step is a step of etching back the oxide film and a surface of the tunnel insulating film on the floating gate. The fifth step is a step of forming a control gate on the tunnel insulating film on the second surface region.

Claims

1. A method of manufacturing a semiconductor device comprising:

forming a floating gate on a first surface region of a semiconductor substrate through a gate insulating film;

forming a tunnel insulating film so as to cover a second surface region adjacent to said first surface region and an end portion of said floating gate;

forming an oxide film so as to cover said tunnel insulating film and be thicker at a portion above said second surface region than at a portion above said floating gate;

etching back said oxide film and a surface of said tunnel insulating film on said floating gate; and

forming a control gate on said tunnel insulating film on said second surface region.

2. The method of manufacturing a semiconductor device according to claim 1, wherein said step of forming said oxide film, includes:

forming said oxide film so as to cover said tunnel insulating film on said second surface region and so as not to cover said tunnel insulating film above said floating gate.

3. The method of manufacturing a semiconductor device according to claim 1, wherein said step of forming said oxide film, includes:

forming a SOG (Spin On Glass) oxide film as said oxide film by rotational coating of SOG material.

4. The method of manufacturing a semiconductor device according to claim 2, wherein said step of forming said oxide film, includes:

forming a SOG (Spin On Glass) oxide film as said oxide film by rotational coating of SOG material.

5. The method of manufacturing a semiconductor device according to claim 3, wherein said step of forming said oxide film, further includes:

performing thermal treatment on said SOG oxide film.

6. The method of manufacturing a semiconductor device according to claim 4, wherein said step of forming said oxide film, further includes:

performing thermal treatment on said SOG oxide film.

7. The method of manufacturing a semiconductor device according to claim 1, wherein one of wet etching, dry etching and a combination of wet etching and dry etching is used in said step of etching back said oxide film.

8. The method of manufacturing a semiconductor device according to claim 2, wherein one of wet etching, dry etching and a combination of wet etching and dry etching is used in said step of etching back said oxide film.

9. The method of manufacturing a semiconductor device according to claim 3, wherein one of wet etching, dry etching and a combination of wet etching and dry etching is used in said step of etching back said oxide film.

10. The method of manufacturing a semiconductor device according to claim 4, wherein one of wet etching, dry etching and a combination of wet etching and dry etching is used in said step of etching back said oxide film.

11. The method of manufacturing a semiconductor device according to claim 5, wherein one of wet etching, dry etching and a combination of wet etching and dry etching is used in said step of etching back said oxide film.

12. The method of manufacturing a semiconductor device according to claim 6, wherein one of wet etching, dry etching and a combination of wet etching and dry etching is used in said step of etching back said oxide film.

13. The method of manufacturing a semiconductor device according to claim 1, wherein said step of forming said tunnel insulating film, includes:

forming a HTO (High Temperature Oxide) film as said tunnel insulating film,

wherein said step of forming said oxide film, includes;

forming a SOG (Spin On Glass) oxide film as said oxide film by rotational coating of SOG material,

wherein said step of etching back said oxide film, includes;

etching back said oxide film and a part of said tunnel insulating film by wet etching.

14. The method of manufacturing a semiconductor device according to claim 1, wherein said step of etching back said oxide film, includes:

etching back said oxide film and said surface of said tunnel insulating film such that said oxide film is removed and said tunnel insulating film is thicker at a portion above said second surface region than at said end portion of said floating gate.

15. The method of manufacturing a semiconductor device according to claim 1, wherein said semiconductor device includes a nonvolatile semiconductor memory.