PRE-MOLDED CLIP STRUCTURE

• US 20100258923A1
• Filed: 06/24/2010
• Published: 10/14/2010
• Est. Priority Date: 01/24/2007
• Status: Active Grant

• Current Assignee: Semiconductor Components Industries LLC (ON Semiconductor Corporation)
• Original Assignee: Erwin Victor Cruz, Maria Cristina B. Estacio
• Inventors: Cruz, Erwin Victor, Estacio, Maria Cristina B.
• Granted Patent: US 7,838,340 B2
• Time in Patent Office: Days
• US Class Current: 257/676
• CPC Class Codes: H01L 2224/03912 the bump being used as a mask for patterning the bonding area
• CPC Class Codes: H01L 2224/0603 Bonding areas having different sizes, e.g. different heights or widths
• CPC Class Codes: H01L 2224/37147 Copper [Cu] as principal constituent
• CPC Class Codes: H01L 2224/40245 the item being metallic
• CPC Class Codes: H01L 2224/40249 the bond pad protruding from the surface of the item
• CPC Class Codes: H01L 2224/4103 Connectors having different sizes
• CPC Class Codes: H01L 2224/84801 Soldering or alloying
• CPC Class Codes: H01L 2224/8485 using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
• CPC Class Codes: H01L 23/49524 the additional leads being a tape carrier or flat leads
• CPC Class Codes: H01L 23/49562 for devices being provided for in H01L29/00
• CPC Class Codes: H01L 23/49575 Assemblies of semiconductor devices on lead frames
• CPC Class Codes: H01L 24/36 Structure, shape, material or disposition of the strap connectors prior to the connecting process
• CPC Class Codes: H01L 24/37 of an individual strap connector
• CPC Class Codes: H01L 24/39 Structure, shape, material or disposition of the strap connectors after the connecting process
• CPC Class Codes: H01L 24/40 of an individual strap connector
• CPC Class Codes: H01L 24/41 of a plurality of strap connectors
• CPC Class Codes: H01L 24/84 using a strap connector
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01005 : Boron [B]
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01015 : Phosphorus [P]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/1305 : Bipolar Junction Transistor [BJT]
• CPC Class Codes: H01L 2924/13091 : Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/19043 : being a resistor

Abstract

A method for making a premolded clip structure is disclosed. The method includes obtaining a first clip and a second clip, and forming a molding material around the first clip comprising a first surface and the second clip comprising a second surface. The first surface of the first clip structure and the second surface of the second clip structure are exposed through the molding material, and a premolded clip structure is then formed.

Claims

1. A method comprising:

obtaining a first clip and a second clip; and

forming a molding material around the first clip comprising a first surface and the second clip comprising a second surface,

wherein the first surface of the first clip structure and the second surface of the second clip structure are exposed through the molding material, and wherein a premolded clip structure is thereafter formed.

2. The method of claim 1 further comprising:

attaching the premolded clip structure to a semiconductor die.

3. The method of claim 2 wherein the semiconductor die comprises a source region and a gate region, and wherein the first clip is a source clip that is electrically coupled to the source region and the second clip is a gate clip electrically coupled to the gate region.

4. A premolded clip structure made according to the process of claim 1.

5. The method of claim 1 wherein the first clip structure comprises a third surface opposite the first surface, and wherein the second clip comprises a fourth surface opposite the second surface, wherein the third surface and fourth surface are also exposed through the molding material.

6. The method of claim 1 further comprising:

attaching the premolded clip structure to a semiconductor die; and

attaching the semiconductor die to a leadframe structure.

7. The method of claim 6 wherein the molding material is a first molding material, and wherein the method further comprises molding a second molding material around the leadframe structure, the premolded clip structure, and the semiconductor die to form a semiconductor die package.

8. The method of claim 7 wherein the semiconductor die package is an MLP-type package.

9. A semiconductor die package made by the process according to claim 7.

10. A semiconductor die package made by the process according to claim 8.

11-20. -20. (canceled)