HIGH DATA RATE INTERFACE WITH IMPROVED LINK SYNCHRONIZATION

• US 20100260055A1
• Filed: 08/10/2009
• Published: 10/14/2010
• Est. Priority Date: 12/08/2003
• Status: Abandoned Application

• Current Assignee: Qualcomm, Inc.
• Original Assignee: Qualcomm, Inc.
• Inventors: Shekhar, Shashank, ANDERSON, Jon James, Steele, Brian, Wiley, George Alan
• Application Number:
  US12/538,320
• Publication Number:
  US 20100260055A1
• Time in Patent Office: Days
• US Class Current: 370/252
• CPC Class Codes: H04L 12/40071 Packet processing; Packet format adaptation of digital video signals for transport over a specific network H04N21/2381, H04N21/4363, H04N21/4381; packet switches H04L49/00; intermediate storage or scheduling H04L49/90
• CPC Class Codes: H04L 12/40117 Interconnection of audio or video/imaging devices home automation networks H04L12/2803; bitstream network arrangements specially adapted for distribution of digital video signals H04N7/24
• CPC Class Codes: H04L 65/1069 Session establishment or de-establishment
• CPC Class Codes: H04L 65/1101 Session protocols
• CPC Class Codes: H04L 65/61 for supporting one-way streaming services, e.g. Internet radio
• CPC Class Codes: H04L 65/80 Responding to QoS
• CPC Class Codes: H04L 69/18 Multiprotocol handlers, e.g. single devices capable of handling multiple protocols
• CPC Class Codes: H04L 69/22 Parsing or analysis of headers
• CPC Class Codes: H04L 69/32 Architecture of open systems interconnection [OSI] 7-layer type protocol stacks, e.g. the interfaces between the data link level and the physical level
• CPC Class Codes: H04M 1/72409 by interfacing with external accessories hands-free H04M1/60
• CPC Class Codes: H04M 1/724097 Worn on the head
• CPC Class Codes: H04W 56/00 Synchronisation arrangements
• CPC Class Codes: Y02D 30/70 in wireless communication networks

Abstract

A data Interface for transferring digital data between a host and a client over a communication path using packet structures linked together to form a communication protocol for communicating a pre-selected set of digital control and presentation data. The signal protocol is used by link controllers configured to generate, transmit, and receive packets forming the communications protocol, and to form digital data into one or more types of data packets, with at least one residing in the host device and being coupled to the client through the communications path. The interface provides a cost-effective, low power, bi-directional, high-speed data transfer mechanism over a short-range “serial” type data link, which lends itself to implementation with miniature connectors and thin flexible cables which are especially useful in connecting display elements such as wearable micro-displays to portable computers and wireless communication devices.

Claims

1. A method for providing a safety margin for a reverse data link encapsulation packet in a mobile display digital interface (MDDI) communication system, the method comprising the steps of:

calculating a round trip delay between a host and a client with a round trip delay measurement packet;

providing a first predetermined time period for a host driver to enable;

providing a second predetermined time period for a client driver to disable; and

introducing a turnaround 2 field length in the reverse data link encapsulation packet that is greater than the sum of the calculated round trip delay, the first predetermined time period and the second predetermined time period.

2. The method of claim 1 wherein the first predetermined time period and the second predetermined time period are substantially similar.

3. The method of claim 1 wherein the first predetermined time period comprises a maximum number of measurement units of round trip delay (t_BIT).

4. The method of claim 1 wherein the turnaround 2 field length is computed using the following equation:

5. A hardware system for providing a safety margin for a reverse data link encapsulation packet in a mobile display digital interface (MDDI) communication system, the system comprising:

a processor;

means for calculating a round trip delay between a host and a client with a round trip delay measurement packet in the processor;

means for providing a first predetermined time period for a host driver to enable in the processor;

means for providing a second predetermined time period for a client driver to disable in the processor; and

means for introducing a turnaround 2 field length in the reverse data link encapsulation packet that is greater than the sum of the calculated round trip delay in the processor, the first predetermined time period and the second predetermined time period.

6. The hardware system of claim 5 wherein the first predetermined time period and the second predetermined time period are substantially similar.

7. The hardware system of claim 5 wherein the first predetermined time period comprises a maximum number of measurement units of round trip delay (t_BIT).

8. The hardware system of claim 5 wherein the turnaround 2 field length is computed using the following equation:

9. A storage media comprising program instructions which are computer-executable on hardware to implement maintenance of a safety margin for a reverse data link encapsulation packet in a mobile display digital interface (MDDI) communication system, the storage media comprising:

program instructions that cause a round trip delay between a host and a client to be calculated with a round trip delay measurement packet;

program instructions that cause a first predetermined time period for a host driver to enable to be provided;

program instructions that cause a second predetermined time period for a client driver to disable be provided; and

program instructions that cause an introduction of a turnaround 2 field length in the reverse data link encapsulation packet that is greater than the sum of the calculated round trip delay, the first predetermined time period and the second predetermined time period.

10. The storage media of claim 9 wherein the first predetermined time period and the second predetermined time period are substantially similar.

11. The storage media of claim 9 wherein the first predetermined time period comprises a maximum number of measurement units of round trip delay (t_BIT).

12. The storage media of claim 9 wherein the turnaround 2 field length is computed using the following equation:

18. The hardware system of claim 11 further comprising a means for sending a turnaround 1 field by the host

13. A method for ensuring reliable clock recovery in a client device in a mobile display digital interface (MDDI) communication system, the method comprising the steps of:

asserting a data enable signal in the client device;

generating a recovered clock in the client device using a strobe signal and a data signal;

receiving an all zero 1 field sent by a host;

de-asserting a data enable signal in the client device; and

generating the recovered clock in the client device solely from the strobe signal.

14. The method of claim 13 further comprising the step of sending a turnaround 1 field by the host.

15. The method of claim 13 wherein the step of receiving an all zero field sent by the host comprises the host toggling the strobe from a beginning of the all zero 1 field to an end of an all zero 2 field.

16. The method of claim 13 further comprising the step of the host re-enabling line drivers during a turnaround 2 field sent by the host.

17. A hardware system for ensuring reliable clock recovery in a client device in a mobile display digital interface (MDDI) communication system, the system comprising:

a processor;

means for asserting a data enable signal in the client device in the processor;

means for generating a recovered clock in the client device using a strobe signal and a data signal in the processor;

means for receiving an all zero 1 field sent by a host in the processor;

means for de-asserting a data enable signal in the client device in the processor; and

means for generating the recovered clock in the client device solely from the strobe signal in the processor.

19. A storage media comprising program instructions which are computer-executable on hardware to implement a reliable clock recovery in a client device in a mobile display digital interface (MDDI) communication system, the storage media comprising:

program instructions that cause a data enable signal to be asserted in the client device;

program instructions that cause a recovered clock be generated in the client device using a strobe signal and a data signal;

program instructions that cause all zero 1 field to be received by the client and sent by a host;

program instructions that cause a data enable signal to be de-asserted in the client device; and

program instructions that cause the recovered clock to be generated in the client device solely from the strobe signal.

20. The storage media of claim 19 further comprising a turnaround 1 field be sent by the host

21. A method for ensuring reliable clock recovery in a client device in a mobile display digital interface (MDDI) communication system, the method comprising the steps of:

generating a recovered clock in the client device solely from a strobe signal;

sending a turnaround 2 field by a host;

receiving an all zero 2 field sent by the host;

asserting a data enable signal in the client device; and

generating the recovered clock in the client device based on the strobe signal and the data signal.

22. The method of claim 21 wherein the step of sending an all zero 2 field by the host comprises the host toggling the strobe signal from a beginning of an all zero 1 field to an end of the all zero 2 field.

23. The method of claim 21 further comprising the step of the host disabling line drivers prior to a last bit of a turnaround 1 field and re-enabling the line drivers during the turn around 2 field.

24. A hardware system for ensuring reliable clock recovery in a client device in a mobile display digital interface (MDDI) communication system, the system comprising:

a processor;

means for generating a recovered clock in the client device solely from a strobe signal in the processor;

means for sending a turnaround 2 field by a host in the processor;

means for receiving an all zero 2 field sent by the host in the processor;

means for asserting a data enable signal in the client device in the processor; and

means for generating the recovered clock in the client device in the processor based on the strobe signal and the data signal.

25. A storage media comprising program instructions which are computer-executable on hardware to implement a reliable clock recovery in a client device in a mobile display digital interface (MDDI) communication system, the storage media comprising:

program instructions that cause a recovered clock to be generated in the client device solely from a strobe signal;

program instructions that cause a turnaround 2 field to be sent by a host;

program instructions that cause all zero 2 field to be received by the client and sent by the host;

program instructions that cause a data enable signal in the client device to be asserted; and

program instructions that cause the recovered clock to be generated in the client device based on the strobe signal and the data signal.