Communicating A Message Request Transaction To A Logical Device

• US 20100260206A1
• Filed: 06/28/2010
• Published: 10/14/2010
• Est. Priority Date: 12/28/2001
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Harriman, David
• Granted Patent: US 8,582,602 B2
• Time in Patent Office: Days
• US Class Current: 370/474
• CPC Class Codes: G06F 11/0745 in an input/output transactions management context input/output processing in general G06F13/00
• CPC Class Codes: G06F 13/4022 using switching circuits, e.g. switching matrix, connection or expansion network G06F13/4009 takes precedence
• CPC Class Codes: G06F 13/4282 on a serial bus, e.g. I2C bus, SPI bus on daisy chain buses G06F13/4247
• CPC Class Codes: H04L 69/22 Parsing or analysis of headers

Abstract

A general input/output communication port implements a communication stack that includes a physical layer, a data link layer and a transaction layer. The transaction layer includes assembling a packet header for a message request transaction to one or more logical devices. The packet header includes a format field to indicate the length of the packet header and to further specify whether the packet header includes a data payload, a subset of a type field to indicate the packet header relates to the message request transaction and a message field. The message field includes a message to implement the message request transaction. The message includes at least one message that is selected from a group of messages. The group of messages to include a message to unlock a logical device, a message to reset a logical device, a message to indicate a correctable error condition, a message to indicate an uncorrectable error condition, a message to indicate a fatal error condition, a message to report a bad request packet, a message to indicate power management and a message to emulate an interrupt signal.

Claims

1. An apparatus comprising:

a communication port to implement a communication stack including a physical layer, a data link layer and a transaction layer, the transaction layer to assemble a packet header for a message request transaction to one or more logical devices, the packet header including;

a format field to indicate a packet header length and to further specify whether the packet header includes a data payload;

a subset of a type field to indicate the packet header relates to the message request transaction; and

a message field to include a message to implement the message request transaction, the message including at least one message selected from a message to indicate power management and a message to emulate an interrupt signal.

2. The apparatus of claim 1, wherein the message to implement the message request transaction comprises the message to emulate an interrupt signal, the interrupt signal to include a legacy peripheral component interconnect (PCI) signal.

3. The apparatus of claim 1, wherein the message field further includes an indication of whether a completion is to be sent for an implemented message request transaction.

4. The apparatus of claim 3, wherein, not supporting the implementation of the message included in the message field is an indication to a logical device that the completion is not to be sent.

5. The apparatus of claim 1, wherein the message is to include at least one message selected from a message to unlock a logical device, a message to reset a logical device, and a message to indicate a correctable error condition.

6. The apparatus of claim 1, wherein the message is to include at least one message selected from a message to indicate an uncorrectable error condition, a message to indicate a fatal error condition, and a message to report a bad request packet.

7. An apparatus comprising:

a communication port to implement a communication stack including a physical layer, a data link layer and a transaction layer, the transaction layer to disassemble a packet header for a message request transaction received at the communication port, the packet header including;

a format field to indicate a packet header length and to further specify whether the packet header includes a data payload;

a subset of a type field to indicate the packet header relates to the message request transaction; and

a sub-field formed of a second subset of the type field and an extension field to indicate that the packet header relates to one of a group of message request transactions.

8. The apparatus of claim 7, further comprising a message field to include a message to implement the message request transaction.

9. The apparatus of claim 8, wherein the message is to include at least one message selected from a message to unlock a logical device and a message to reset a logical device.

10. The apparatus of claim 9, wherein the message is to include at least one message selected from a message to indicate power management and a message to emulate an interrupt signal.

11. The apparatus of claim 10, wherein the message is to include at least one message selected from a message to reset a logical device, a message to indicate a correctable error condition, a message to indicate an uncorrectable error condition, a message to indicate a fatal error condition, and a message to report a bad request packet.

12. The apparatus of claim 8, wherein the message field further includes an indication of whether a completion is to be sent for an implemented message request transaction.

13. The apparatus of claim 12, wherein, not supporting the implementation of the message included in the message field is an indication that the completion is not to be sent.

14. A system comprising:

a transmitter including a communication port to implement a communication stack having a physical layer, a link layer and a transaction layer, wherein the transaction layer is to assemble a packet header for a transaction layer packet to one or more logical devices, the packet header including;

a length field to indicate a length of data included in the transaction layer packet;

a type field to indicate at least in part a type of the transaction layer packet; and

a third field to extend one of the type field and the length field; and

a receiver coupled to the transmitter and including the logical device, the receiver to receive the packet header at a communication port to implement the communication stack and including the physical layer, the link layer, and the transaction layer, the transaction layer to disassemble the packet header for the logical device.

15. The system of claim 14, wherein the packet header further includes a message field to include a message to implement a message request transaction, the message to include at least one message selected from a message to unlock a logical device, a message to reset a logical device, a message to indicate a correctable error condition, a message to indicate an uncorrectable error condition, a message to indicate a fatal error condition, a message to report a bad request packet, a message to indicate power management and a message to emulate an interrupt signal.

16. The system of claim 15, wherein the message field in the packet header further includes an indication of whether a completion is to be sent for an implemented message request transaction.

17. The system of claim 14, the packet header further comprising:

a requester identification field to include information to identify a requester for a message request transaction; and

a tag field to include information to identify a completion relating to the message request, wherein the requester identification field and the tag field together form a transaction identification field.

18. The system of claim 17, wherein the requester identification field comprises the requester identification field to include a bus number, a device number and a function number associated with the requester.

19. The system of claim 14, wherein the transaction layer at the receiver, based on the logical device implementing the message included in the message field, is to assemble a packet header relating to a completion message, the packet header relating to the completion message to include:

a completion status field to indicate a status of a completion;

a completer identification field to include a bus number for the logical device, a device number for the logical device and a function number associated with the logical device; and

the transaction identification field included in the packet header of the packet relating to the message request;

the receiver to forward the completion message to the transmitter.

20. The system of claim 19, wherein the status of a completion included in the completion status field comprises at least one status selected from a successful completion, an unsupported message request, and a completer abort.