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RELIABILITY, AVAILABILITY, AND SERVICEABILITY IN A MEMORY DEVICE

  • US 20100262889A1
  • Filed: 06/28/2010
  • Published: 10/14/2010
  • Est. Priority Date: 06/30/2006
  • Status: Active Grant
First Claim
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1. A memory device comprising:

  • a memory core having a first portion to store data bits and a second portion to store error correction code (ECC) bits (stored ECC bits) corresponding to the data bits; and

    error correction logic on the same die as the memory core, the error correction logic including ECC computation logic to compute ECC bits (computed ECC bits) corresponding to the data bits.

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