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Compensatory Memory System

  • US 20100265779A1
  • Filed: 04/16/2010
  • Published: 10/21/2010
  • Est. Priority Date: 04/16/2009
  • Status: Active Grant
First Claim
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1. An compensatory memory system with voltage scaling, comprising:

  • a clock generator for transmitting a second clock signal in response to receiving the first clock signal;

    a first decode logic block for receiving a first group of addresses associated with data storage locations and the second clock signal, the first decode logic block operative for transmitting a second group of addresses in response to receiving the first group of addresses;

    a compensatory delay device coupled for receiving the second clock signal and operative for transmitting an enable signal;

    wherein the compensatory delay device is designed using a slow process corner and the compensatory memory system with voltage scaling has increased performance by compensating for logic delays an amplifier trigger speed.

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