LOAD REQUEST SCHEDULING IN A CACHE HIERARCHY
First Claim
1. A method of data processing in a processing unit, including a processor core, an upper level cache memory, and a lower level cache memory, the method comprising:
- in response to receiving a load-type request issued of the processor core at the lower level cache memory, allocating an entry among a plurality of entries in a request queue of the lower level cache memory to the load-type request;
detecting contention for one or more resources between the load-type request and another memory access request in the processing unit;
in response to detecting contention for at least one of the one or more resources, suspending issuance of the load-type request from the entry of the request queue until the contention is resolved; and
in response to removal of the contention, issuing the load-type request from the request queue for processing by the lower level cache memory.
2 Assignments
0 Petitions
Accused Products
Abstract
A system and method for tracking core load requests and providing arbitration and ordering of requests. When a core interface unit (CIU) receives a load operation from the processor core, a new entry in allocated in a queue of the CIU. In response to allocating the new entry in the queue, the CIU detects contention between the load request and another memory access request. In response to detecting contention, the load request may be suspended until the contention is resolved. Received load requests may be stored in the queue and tracked using a least recently used (LRU) mechanism. The load request may then be processed when the load request resides in a least recently used entry in the load request queue. CIU may also suspend issuing an instruction unless a read claim (RC) machine is available. In another embodiment, CIU may issue stored load requests in a specific priority order.
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Citations
20 Claims
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1. A method of data processing in a processing unit, including a processor core, an upper level cache memory, and a lower level cache memory, the method comprising:
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in response to receiving a load-type request issued of the processor core at the lower level cache memory, allocating an entry among a plurality of entries in a request queue of the lower level cache memory to the load-type request; detecting contention for one or more resources between the load-type request and another memory access request in the processing unit; in response to detecting contention for at least one of the one or more resources, suspending issuance of the load-type request from the entry of the request queue until the contention is resolved; and in response to removal of the contention, issuing the load-type request from the request queue for processing by the lower level cache memory. - View Dependent Claims (2, 3, 4)
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5. A method of data processing in a processing unit, including a processor core, an upper level cache memory, and a lower level cache memory, the method comprising:
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in response to receiving a load request issued of the processor core at the lower level cache memory, allocating an entry among a plurality of entries in a request queue of the lower level cache memory to the load request; tracking a plurality of received load requests in the plurality of entries of the queue with a least recently used (LRU) mechanism; and issuing the load request from the entry of the queue for processing in the lower level cache memory when the load request resides in a least recently used entry among the plurality of entries in the queue. - View Dependent Claims (6, 7, 8)
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9. A data processing system, comprising:
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a local processor core; a cache memory coupled to the local processor core; and processing logic executing on the processor core for enabling the data processing system to perform the steps of; in response to receiving a load-type request issued of the processor core at the lower level cache memory, allocating an entry among a plurality of entries in a request queue of the lower level cache memory to the load-type request; detecting contention for one or more resources between the load-type request and another memory access request in the processing unit; in response to detecting contention for at least one of the one or more resources, suspending issuance of the load-type request from the entry of the request queue until the contention is resolved; and in response to removal of the contention, issuing the load-type request from the request queue for processing by the lower level cache memory. - View Dependent Claims (10, 11, 12)
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13. A data processing system, comprising:
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a local processor core; a cache memory coupled to the local processor core; and processing logic executing on the processor core for enabling the data processing system to perform the steps of; in response to receiving a load request issued of the processor core at the lower level cache memory, allocating an entry among a plurality of entries in a request queue of the lower level cache memory to the load request; tracking a plurality of received load requests in the plurality of entries of the queue with a least recently used (LRU) mechanism; and issuing the load request from the entry of the queue for processing in the lower level cache memory when the load request resides in a least recently used entry among the plurality of entries in the queue. - View Dependent Claims (14, 15, 16)
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17. A computer-readable storage medium having a plurality of instructions embodied therein, wherein the plurality of instructions, when executed by a processing device, allows a machine to:
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in response to receiving a load-type request issued of the processor core at the lower level cache memory, allocate an entry among a plurality of entries in a request queue of the lower level cache memory to the load-type request; detecting contention for one or more resources between the load-type request and another memory access request in the processing unit; in response to detect contention for at least one of the one or more resources, suspending issuance of the load-type request from the entry of the request queue until the contention is resolved, wherein the suspending further comprises, setting a suspend bit of the entry for the duration of the contention; and in response to removal of the contention, issue the load-type request from the request queue for processing by the lower level cache memory. - View Dependent Claims (18)
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19. A computer-readable storage medium having a plurality of instructions embodied therein, wherein the plurality of instructions, when executed by a processing device, allows a machine to:
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in response to receiving a load request issued of the processor core at the lower level cache memory, allocating an entry among a plurality of entries in a request queue of the lower level cache memory to the load request; tracking a plurality of received load requests in the plurality of entries of the queue with a least recently used (LRU) mechanism; issuing the load request from the entry of the queue for processing in the lower level cache memory when the load request resides in a least recently used entry among the plurality of entries in the queue; detect contention for one or more resources between the load request and another memory access request in the processing unit; in response to detecting contention for at least one of the one or more resources, suspend processing of the load request in the entry of the queue until the contention is resolved, wherein the suspending further comprises, setting a suspend bit of the entry for the duration of the contention; and update a tracking information of the load request in the queue, wherein the tracking information may include read claim (RC) number. - View Dependent Claims (20)
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Specification