LITHOGRAPHIC APPARATUS, CONTROL SYSTEM, MULTI-CORE PROCESSOR, AND A METHOD TO START TASKS ON A MULTI-CORE PROCESSOR

• US 20100268913A1
• Filed: 03/18/2010
• Published: 10/21/2010
• Est. Priority Date: 04/15/2009
• Status: Abandoned Application

• Current Assignee: ASML Netherlands BV (ASML Holding NV)
• Original Assignee: ASML Netherlands BV (ASML Holding NV)
• Inventors: VAN HALDER, Robert Lambertus Cornelius Johannes, Alberts, Wilhelmus Theodorus Maria, Nauber, Richard
• Application Number:
  US12/726,396
• Publication Number:
  US 20100268913A1
• Time in Patent Office: Days
• US Class Current: 712/29
• CPC Class Codes: G03F 7/70491 Information management, e.g. software; Active and passive control, e.g. details of controlling exposure processes or exposure tool monitoring processes
• CPC Class Codes: G06F 9/4843 by program, e.g. task dispatcher, supervisor, operating system
• CPC Class Codes: G06F 9/52 Program synchronisation; Mutual exclusion, e.g. by means of semaphores

Abstract

A multi-core processor includes two or more cores; an external communication facility that is shared by the cores and is capable of communicating with one of the cores at a time; and an internal communication facility capable of communicating simultaneously with each one of the cores; wherein the multi-core processor is configured to: receive a first signal via the external communication facility; relay the first signal to one of the cores; handle the first signal by the one of the cores, thereby generating a second signal; transmit substantially at the same time the second signal to each one of the cores by the internal communication facility; start a task on each one of the cores in response to the receiving of the second signal.

Claims

1. A multi-core processor comprising:

two or more cores;

an external communication facility that is shared by the cores and is capable of communicating with one of the cores at a time; and

an internal communication facility capable of communicating simultaneously with each one of the cores;

wherein the multi-core processor is configured to;

receive a first signal via the external communication facility;

relay the first signal to one of the cores;

handle the first signal by the one of the cores to generate a second signal;

transmit substantially at a same time the second signal to each one of the cores by the internal communication facility; and

start a task on each one of the cores in response to the receipt of the second signal.

2. The multi-core processor of claim 1, wherein the multi-core processor is configured to start the task on all cores after receiving the second signal, including the core handling the first signal.

3. The multi-core processor of claim 1, wherein the multi-core processor is configured to set a priority of the second signal to be higher than a priority of the first signal.

4. The multi-core processor of claim 1, wherein the internal communication facility comprises a timer configured to generate the second signal.

5. A control system to control a process in a lithographic apparatus, the control system comprising a multi-core processor configured to calculate an output of the control system based on an input of a device, wherein the multi-core processor comprises:

two or more cores;

an external communication facility that is shared by the cores and is capable of communicating with one of the cores at a time; and

an internal communication facility capable of communicating simultaneously with each one of the cores;

wherein the multi-core processor is configured to;

receive a first signal via the external communication facility;

relay the first signal to one of the cores;

handle the first signal by the one of the cores to generate a second signal;

transmit substantially at a same time the second signal to each one of the cores by the internal communication facility; and

start a task on each one of the cores in response to the receiving of the second signal.

6. The control system of claim 5, wherein the multi-core processor is configured to start the task on all cores after receiving the second signal, including the core handling the first signal.

7. The control system of claim 5, wherein the multi-core processor is configured to set a priority of the second signal to be higher than a priority of the first signal.

8. The control system of claim 5, wherein the multi-core processor comprises a timer configured to generate the second signal.

9. A lithographic apparatus comprising a control system to control a process in the lithographic apparatus and a sensor to provide an input to the control system based on the process, the control system comprising a multi-core processor configured to calculate an output of the control system based on the input of the sensor, wherein the multi-core processor comprises:

two or more cores;

an external communication facility that is shared by the cores and is capable of communicating with one of the cores at a time; and

an internal communication facility capable of communicating simultaneously with each one of the cores;

wherein the multi-core processor is configured to;

receive a first signal via the external communication facility;

relay the first signal to one of the cores;

handle the first signal by the one of the cores to generate a second signal;

transmit substantially at a same time the second signal to each one of the cores by the internal communication facility; and

start a task on each one of the cores in response to the receiving of the second signal.

10. The lithographic apparatus of claim 9, wherein the multi-core processor is configured to start a task on all cores after receiving the second signal, including the core handling the first signal.

11. The lithographic apparatus of claim 9, wherein the multi-core processor is configured to set a priority of the second signal to be higher than a priority of the first signal.

12. The lithographic apparatus of claim 9, wherein the multi-core processor comprises a timer configured to generate the second signal.

13. A method of starting tasks on cores of a multi-core processor comprising an external communication facility that is shared by the cores, the external communication facility being capable of communicating with one core at a time, and an internal communication facility being capable of communicating simultaneously with each one of the cores, the method comprising:

receiving a first signal via the external communication facility;

relaying the first signal to one of the cores;

handling the first signal by the one of the cores to generate a second signal;

transmitting substantially at the same time the second signal to each one of the cores by the internal communication facility; and

starting the tasks on each one of the cores in response to the receiving of the second signal.

14. The method of claim 13, wherein a priority of the second signal is set by the multi-core processor to be higher than a priority of the first signal.

15. The method of claim 13, wherein the second signal is generated by a timer.