Allocation And Efficient Use Of Display Memory Bandwidth

• US 20100271380A1
• Filed: 04/24/2009
• Published: 10/28/2010
• Est. Priority Date: 04/24/2009
• Status: Active Grant

• Current Assignee: Columbia Peak Ventures, LLC (Dominion Harbor Enterprises, LLC)
• Original Assignee: Seiko Epson Corporation (Seiko Group)
• Inventors: Jeffrey, Eric, Low, Yun Shon
• Granted Patent: US 8,446,421 B2
• Time in Patent Office: Days
• US Class Current: 345/545
• CPC Class Codes: G09G 2310/04 Partial updating of the display screen
• CPC Class Codes: G09G 2310/061 for resetting or blanking
• CPC Class Codes: G09G 3/344 based on particles moving in a fluid or in a gas, e.g. electrophoretic devices electrophoretic devices per se G02F1/167
• CPC Class Codes: G09G 5/363 Graphics controllers
• CPC Class Codes: G09G 5/395 Arrangements specially adapted for transferring the contents of the bit-mapped memory to the screen G09G5/399 takes precedence

Abstract

A method includes fetching first synthesized pixels from an update buffer of a memory and fetching data pixels from an image buffer of the memory during the first drive frame period. Respective data pixels are fetched synchronously with the fetching of corresponding first synthesized pixels. Respective data pixels fetched from the image buffer are synthesized with corresponding first synthesized pixels to generate second synthesized pixels. The second synthesized pixels are stored in the update buffer during the first drive frame period. The storing of second synthesized pixels may be paused based on a prediction that the fetching of first synthesized pixels will not complete within the first drive frame period. The fetching of data pixels from the image buffer of the memory may also be paused based on the prediction that the fetching of first synthesized pixels will not complete within the first drive frame period.

Claims

1. A method for generating synthesized pixels, comprising:

during a first one of two or more drive frame periods;

fetching all first synthesized pixels stored in an update buffer;

fetching one or more data pixels from an image buffer, the data pixels corresponding with pixel locations within a submatrix of a display matrix of a display device;

generating one or more second synthesized pixels and storing the second synthesized pixels in the update buffer; and

pausing the generating and storing of the second synthesized pixels based on a prediction that the fetching of the first synthesized pixels will not complete within the first drive frame period.

2. The method of claim 1, further comprising pausing the fetching of the data pixels from the image buffer based on the prediction that the fetching of the first synthesized pixels will not complete within the first drive frame period.

3. The method of claim 1, further comprising resuming the generating and storing of the second synthesized pixels in a second drive frame period subsequent to the first drive frame period.

4. The method of claim 1, further comprising holding off all accesses to the image buffer during the first drive frame period based on the prediction that the fetching of first synthesized pixels will not complete within the first drive frame period.

5. The method of claim 1, further comprising providing drive pulses corresponding with the first synthesized pixels to the display device during the first drive frame period.

6. The method of claim 1, wherein the first synthesized pixels and the data pixels are fetched synchronously.

7. The method of claim 1, wherein the prediction that the fetching of the first synthesized pixels will not complete within the first drive frame period includes monitoring the fetching of the first synthesized pixels from the update buffer.

8. The method of claim 1, wherein the prediction that the fetching of the first synthesized pixels will not complete within the first drive frame period includes monitoring the level of fullness of at least one buffer used to store drive pulse data.

9. The method of claim 1, wherein the prediction that the fetching of the first synthesized pixels will not complete within the first drive frame period includes monitoring the amount of memory bandwidth remaining in the first drive frame.

10. The method of claim 1, wherein the prediction that the fetching of the first synthesized pixels will not complete within the first drive frame period includes monitoring the elapsed amount of time in the first drive frame.

11. An apparatus, comprising:

a memory including an image buffer and an update buffer;

a first unit to fetch all first synthesized pixels stored in the update buffer;

a second unit to;

fetch one or more data pixels from the image buffer, the data pixels corresponding with pixel locations within a submatrix of a display matrix of a display device,

generate and store one or more second synthesized pixels in the update buffer; and

a third unit to predict whether the fetching of all first synthesized pixels will not complete within a first drive frame period and to pause the generating and storing of the second synthesized pixels based on a prediction that the fetching of all first synthesized pixels will not complete within a first drive frame period.

12. The apparatus of claim 11, wherein the third unit is operable to pause the fetching of the data pixels from the image buffer based on the prediction that all first synthesized pixels will not be fetched within the first drive frame period.

13. The apparatus of claim 11, wherein the third unit is operable to resume the generating and storing of the second synthesized pixels in a second drive frame period subsequent to the first drive frame period.

14. The apparatus of claim 11, wherein the third unit is operable to hold off all accesses to the image buffer during the first drive frame period based on the prediction that all first synthesized pixels will not be fetched within the first drive frame period.

15. The apparatus of claim 11, wherein the apparatus is operable to cause drive pulses corresponding with the first synthesized pixels to be provided the display device during the first drive frame period.

16. The apparatus of claim 11, wherein the first unit fetches first synthesized pixels synchronously with the fetching of data pixels by the second unit.

17. The apparatus of claim 11, further comprising at least one buffer to store drive pulse data, wherein the prediction of whether the fetching of all first synthesized pixels will not complete within the first drive frame period includes monitoring the level of fullness of the at least one buffer.

18. A system, comprising:

a display device having display pixels that are updated in two or more drive frame periods;

a memory including an image buffer and an update buffer;

a first unit to fetch all first synthesized pixels stored in the update buffer;

a second unit to;

fetch one or more data pixels from the image buffer, the data pixels corresponding with pixel locations within a submatrix of a display matrix of the display device,

generate and store one or more second synthesized pixels in the update buffer; and

a third unit to predict whether the fetching all first synthesized pixels will not complete within a first drive frame period and to pause the generating and storing of the second synthesized pixels based on a prediction that the fetching all first synthesized pixels will not complete within a first drive frame period.

19. The system of claim 18, wherein the third unit is operable to resume the generating and storing of the second synthesized pixels in a second drive frame period subsequent to the first drive frame period.

20. The system of claim 18, wherein the first unit provides fetched first synthesized pixels to the second unit, the second unit generating second synthesized pixels based at least in part on data included in the fetched first synthesized pixels.