JUNCTIONLESS METAL-OXIDE-SEMICONDUCTOR TRANSISTOR

• US 20100276662A1
• Filed: 04/02/2010
• Published: 11/04/2010
• Est. Priority Date: 09/05/2008
• Status: Active Grant

• Current Assignee: University College Cork (Higher Education Authority)
• Original Assignee: University College Cork- National University of Ireland
• Inventors: Colinge, Jean-Pierre
• Granted Patent: US 8,178,862 B2
• Time in Patent Office: Days
• US Class Current: 257/9
• CPC Class Codes: B82Y 10/00 Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
• CPC Class Codes: H01L 2029/7857 of the accumulation type
• CPC Class Codes: H01L 29/0665 the shape of the body defining a nanostructure nanotechnology per se B82B
• CPC Class Codes: H01L 29/0673 oriented parallel to a substrate
• CPC Class Codes: H01L 29/66795 with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
• CPC Class Codes: H01L 29/785 having a channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621

Abstract

A junctionless metal-oxide-semiconductor transistor is described. In one aspect, a transistor device comprises a semiconductor material. The semiconductor material comprises first, second, and third portions. The second portion is located between the first and third portions. The first, second, and third portions are doped with dopants of the same polarity and the same concentration. The transistor device further comprises an electrode connected to the second portion. A current flows between the first and third portions when a voltage is applied to the electrode.

Claims

1. A transistor device comprising:

a semiconductor material comprising first, second, and third portions, wherein the second portion is located between the first and third portions and wherein the first, second, and third portions are doped with dopants of the same polarity and the same concentration; and

an electrode connected to the second portion, wherein a current flows between the first and third portions when a voltage is applied to the electrode.

2. The transistor device of claim 1, wherein the first portion comprises a source, the second portion comprises a channel, and the third portion comprises a drain.

3. The transistor device of claim 1, further comprising a voltage controller configured to vary the voltage to control the current.

4. The transistor device of claim 1, wherein the semiconductor material is junction-less.

5. The transistor device of claim 1, further comprising an insulating layer located between the electrode and the second portion.

6. The transistor device of claim 5, wherein the insulating layer comprises a high-K dielectric.

7. The transistor device of claim 1, wherein the semiconductor material comprises a nano-structure.

8. The transistor device of claim 7, wherein the nano-structure comprises a nano-wire or a nano-ribbon.

9. The transistor device of claim 1, wherein each of the first, second, and third portions are N⁺-type.

10. The transistor device of claim 1, wherein each of the first, second, and third portions are P⁺-type.

11. The transistor device of claim 1, wherein the electrode is doped with dopants of a polarity that is opposite to the polarity of the dopants of the second portion.

12. The transistor device of claim 1, wherein the electrode comprises a conductive material and wherein no current flows between the first and third portions when no voltage is applied to the electrode.

13. The transistor device of claim 1, wherein the electrode is attached to at least first and second surfaces of the second portion, the second surface being opposite the first surface.

14. The transistor device of claim 1, wherein the semiconductor material further comprises a fourth portion located adjacent to the first or third portion, wherein the fourth portion is doped with a dopant having the same polarity as and a higher concentration than the dopant in the first or third portion.

15. The transistor device of claim 14, further comprising:

fifth, sixth, and seventh portions of the semiconductor material, wherein the sixth portion is located between the fifth and seventh portions and wherein the fifth, sixth, and seventh portions are doped with dopants of the same polarity and the same concentration as the dopants of the first, second, and third portions; and

another electrode connected to the sixth portion, wherein a current flows between the fifth and seventh portions when a voltage is applied to the other electrode, wherein the fourth portion is between the first, second, and third portions and the fifth, sixth, and seventh portions.

16. The transistor device of claim 1, wherein the semiconductor material comprises at least one of the following:

silicon, carbon, germanium, SiGe, SiGeC, a III-V alloy, and a polycrystalline semiconductor.

17. The transistor device of claim 16, wherein the III-V alloy comprises at least one of the following:

boron, aluminum, gallium, indium, thallium, nitrogen, phosphorous, arsenic, antimony, and bismuth.

18. The transistor device of claim 1, wherein the electrode comprises at least one of the following:

polysilicon, metal, and TiN.

19. A transistor device comprising:

a semiconductor material comprising first, second, and third portions, wherein the second portion is located between the first and third portions and wherein the first, second, and third portions are doped with dopants of the same polarity and the same concentration; and

an electrode connected to the second portion, wherein a current flows between the first and third portions when a voltage is applied to the electrode,

wherein the concentration of the dopants is approximately 1×

10¹⁹ atom/cm³ or greater.

20. The transistor of claim 19, wherein the concentration of the dopants is 2×

10¹⁹ atom/cm³ or greater.

21. The transistor of claim 19, wherein the concentration of the dopants is 3×

10¹⁹ atom/cm³ or greater.

22. The transistor of claim 19, wherein the concentration of the dopants is 8×

10¹⁹ atom/cm³ or greater.

23. The transistor of claim 19, wherein the concentration of the dopants is between 1×

10¹⁹ and 1×

10²⁰.

24. A method of manufacturing a transistor device, the method comprising:

doping first, second, and third portions of a semiconductor material with dopants of the same polarity and the same concentration, wherein the second portion is located between the first and third portions; and

connecting an electrode to the second portion, wherein a current flows between the first and third portions when a voltage is applied to the electrode.

25. The method of claim 24, wherein the first portion comprises a source, the second portion comprises a channel, and the third portion comprises a drain.

26. The method of claim 24, wherein the semiconductor material is junction-less.

27. The method of claim 24, wherein connecting an electrode to the second portion comprises connecting the electrode to an insulating layer connected to the second portion.

28. The method of claim 24, wherein doping first, second, and third portions comprises N⁺-type doping the first, second, and third portions.

29. The method of claim 24, wherein doping first, second, and third portions comprises P⁺-type doping the first, second, and third portions.

30. The method of claim 24, wherein the electrode comprises a conductive material and wherein no current flows between the first and third portions when no voltage is applied to the electrode.

31. The method of claim 24, wherein the semiconductor material comprises at least one of the following:

silicon, carbon, germanium, SiGe, SiGeC, a III-V alloy, and a polycrystalline semiconductor.

32. The method of claim 31, wherein the III-V alloy comprises at least one of the following:

boron, aluminum, gallium, indium, thallium, nitrogen, phosphorous, arsenic, antimony, and bismuth.

33. The method of claim 24, wherein the concentration of the dopants is approximately 1×

10¹⁹ atom/cm³ or greater.

34. A transistor device comprising:

first, second, and third means for conducting a current, wherein the second means is located between the first and third means, and wherein the first, second, and third means are doped with dopants of the same polarity and the same concentration; and

means for applying a voltage to the second means, wherein a current flows between the first and third means when a voltage is applied.

35. The transistor device of claim 34, wherein the first means comprises a source, the second means comprises a channel, and the third means comprises a drain.

36. The transistor device of claim 34, wherein the first, second, and third means are junction-less.

37. The transistor device of claim 34, further comprising a means for insulating located between the means for applying a voltage and the second means.

38. The transistor device of claim 34, wherein each of the first, second, and third means comprises a semiconductor material of N⁺-type.

39. The transistor device of claim 34, wherein each of the first, second, and third means comprises a semiconductor material of P⁺-type.

40. The transistor device of claim 34, wherein the means for applying a voltage comprises a conductive material and wherein no current flows between the first and third means when no voltage is applied.

41. The transistor device of claim 34, wherein the first, second, and third means comprise at least one of the following:

silicon, carbon, germanium, SiGe, SiGeC, a III-V alloy, and a polycrystalline semiconductor.

42. The transistor device of claim 41, wherein the III-V alloy comprises at least one of the following:

boron, aluminum, gallium, indium, thallium, nitrogen, phosphorous, arsenic, antimony, and bismuth.

43. The transistor device of claim 34, wherein the concentration of the dopants is approximately 1×

10¹⁹ atom/cm³ or greater.