ADDRESSABLE INTEGRATED CIRCUIT AND METHOD THEREOF

• US 20100280786A1
• Filed: 04/30/2010
• Published: 11/04/2010
• Est. Priority Date: 05/01/2009
• Status: Active Grant

• Current Assignee: Analog Devices, Inc.
• Original Assignee: Analog Devices, Inc.
• Inventors: GIBBONS, James, CREEDON, Tadhg, O'RIORDAN, Katherine, REIDY, John, MORRISSEY, John, GORBOLD, Jeremy
• Granted Patent: US 9,158,727 B2
• Time in Patent Office: Days
• US Class Current: 702/120
• CPC Class Codes: G01R 31/396 Acquisition or processing of data for testing or for monitoring individual cells or groups of cells within a battery
• CPC Class Codes: G06F 12/0661 and decentralised selection
• CPC Class Codes: G06F 13/4247 on a daisy chain bus

Abstract

An exemplary method and system of addressing an integrated circuit within a daisy chain network. In the exemplary method, the address of the integrated circuit may be initialized to a predetermined initial address. The integrated circuit may receive a command that includes a type identifier and an address field. Based on the type identifier, the type of command may be determined. As a result of the determination, reading the address from the address field. The read address may be stored in a register. The address may be modified, and may be output. Upon receipt of the data or a command, the integrity of the data including data within the received command, may be confirmed by an error checking algorithm.

Claims

1. An integrated circuit, comprising:

a transceiver for receiving an input signal and transmitting an output signal; and

a controller configured to;

determine a type of a command in an input signal received by the transceiver;

assign a predetermined address to an address module of the integrated circuit, if the command is determined to be a first type, or, if the type of command is determined to be a second type, write an address in the command to the address module; and

output signals based on the determined type of commands.

2. The integrated circuit of claim 1, the transceiver comprising:

an input for receiving data and instructions from a processor; and

an output for distributing the received data and instructions to the controller.

3. The integrated circuit of claim 2, wherein the transceiver, based on the determination of the type of command by the controller, is configured to send address data to another integrated circuit communicatively coupled to the transceiver.

4. The integrated circuit of claim 1, wherein the controller is further configured to:

execute an error checking algorithm on the input signal to confirm that the input signal is addressed to the integrated circuit.

5. The integrated circuit of claim 4, wherein the controller is further configured to:

send response to the processor if the result of the error checking algorithm indicates that the input signal was sent to the integrated circuit in error.

6. The integrated circuit of claim 1, further comprising:

a measurement circuit configured to;

measure parameters of a battery stack; and

output signals representative of the measured battery stack parameters;

the controller communicatively coupled to the measurement circuit, the controller configured to;

execute an error checking algorithm using the stored address on the input signal to confirm that the input signal is addressed to the integrated circuit; and

poll a processor, connected to the controller using the address stored in address module, for data related to the measured battery stack parameters.

7. A method of addressing an integrated circuit within a daisy chain network comprising:

initializing the address of the integrated circuit to a predetermined initial address;

receiving a command at the integrated circuit, the command including a type identifier;

determining the type of command based on the type identifier;

based upon the result of the determination, reading an address from the command;

storing the address in a register;

modifying the address; and

outputting a modified command containing the modified address for delivery to another integrated circuit in the daisy chain network.

8. The method of claim 7, wherein the determining comprises analyzing the type identifier of the command to identify whether the command was transmitted by another integrated circuit or by a processor.

9. The method of claim 7, wherein the modifying comprises incrementing the read address to a next address value.

10. The method of claim 7, further comprising:

in response to receiving the command, processing data of the received command using an error checking algorithm, the error checking algorithm using a unique address stored in a register of the integrated circuit;

if the result of the error checking indicates no error, processing the received data according to the received command; and

if the result of the error checking indicates an error, sending an error signal by the controller to a processor connected to the integrated circuit.

11. The method of claim 10, wherein the error checking algorithm is a cyclic redundancy check algorithm.

12. The method of claim 7, further comprising:

receiving by the controller an input from a functional unit communicatively coupled to the integrated circuit.

13. The method of claim 12, wherein the functional unit is a measurement circuit, wherein the measurement circuit is configured to:

measure parameters of a battery stack; and

output signals representative of the measured battery stack parameters.