OVERLAPPING, TWO-SEGMENT CAPACITOR BANK FOR VCO FREQUENCY TUNING

• US 20100283551A1
• Filed: 05/07/2009
• Published: 11/11/2010
• Est. Priority Date: 05/07/2009
• Status: Active Grant

• Current Assignee: Qualcomm, Inc.
• Original Assignee: Qualcomm, Inc.
• Inventors: Zeng, Yi, Pan, Tzu-wang, Lin, I-Hsiang
• Granted Patent: US 8,169,270 B2
• Time in Patent Office: Days
• US Class Current: 331/117FE
• CPC Class Codes: H03B 5/1212 the amplifier comprising a pair of transistors, wherein an output terminal of each being connected to an input terminal of the other, e.g. a cross coupled pair
• CPC Class Codes: H03B 5/1228 the amplifier comprising one or more field effect transistors
• CPC Class Codes: H03B 5/1253 the transistors being field-effect transistors
• CPC Class Codes: H03B 5/1265 switched capacitors
• CPC Class Codes: H03B 5/1293 having means for achieving a desired tuning characteristic, e.g. linearising the frequency characteristic across the tuning voltage range

Abstract

A VCO (for example, in an FM receiver) includes an LC resonant tank. The LC resonant tank includes a coarse tuning capacitor bank and a fine tuning capacitor bank. The coarse tuning capacitor bank contains a plurality of digitally controlled coarse tuning capacitor elements, each providing a first capacitance value when active. The fine tuning capacitor bank contains a plurality of digitally controlled fine tuning capacitor elements, each providing a second capacitance value when active. To address the practical problem of capacitor mismatch, capacitance overlap throughout the VCO tuning range is created by selecting the first and second capacitance values such that the capacitance value of the fine capacitor bank is greater than the first capacitance value when all of the digitally controlled fine tuning capacitor elements of the fine capacitor bank are active.

Claims

1. An oscillator comprising:

a first oscillating node;

a second oscillating node;

a first plurality of first tuning capacitor elements, wherein each first tuning capacitor element in a first state provides a first capacitance between the first and second oscillating nodes, and wherein each first tuning capacitor element in a second state provides substantially no capacitance between the first and second oscillating nodes; and

a second plurality of second tuning capacitor elements, wherein each second tuning capacitor element in a first state provides a second capacitance between the first and second oscillating nodes, wherein each second tuning capacitor element in a second state provides substantially no capacitance between the first and second oscillating nodes, wherein the second capacitance is smaller than the first capacitance.

2. The oscillator of claim 1, wherein each of the first tuning capacitor elements comprises:

a first capacitor having a first lead and a second lead, wherein the first lead is coupled to the first oscillating node;

a second capacitor having a first lead and a second lead, wherein the first lead is coupled to the second oscillating node; and

a switching element that in the first state is conductive and couples the second lead of the first capacitor to the second lead of the second capacitor, and in the second state is substantially nonconductive.

3. The oscillator of claim 1, wherein the first plurality of first tuning elements is a first thermometer-coded capacitor bank, and wherein the second plurality of second tuning elements is a second thermometer-coded capacitor bank.

4. The oscillator of claim 1, wherein there is a number, Y, of second tuning capacitor elements, and wherein the product of Y and the second capacitance is greater than the first capacitance.

5. The oscillator of claim 1, wherein the oscillator is a Voltage Controlled Oscillator within a Frequency Modulation (FM) radio receiver.

6. The oscillator of claim 2, wherein the switching element is controlled by a digital bit, and wherein the switching element is caused to be in the first state for a first value of the digital bit and is caused to be in the second state for a second value of the digital bit.

7. The oscillator of claim 1, further comprising:

an amount of capacitor bank selection logic coupled to the first plurality of first tuning capacitor elements, wherein the amount of capacitor bank selection logic generates a capacitor bank code, and wherein the capacitor bank code determines whether each first tuning capacitor element is in the first state and whether each first tuning capacitor element is in the second state.

8. A method comprising:

switching a state of a first tuning capacitor element in response to a first capacitor bank code, wherein the first tuning capacitor element is one of a first plurality of first tuning capacitor elements, wherein each first tuning capacitor element in a first state provides a first capacitance between a first oscillating node and a second oscillating node of an oscillator, and wherein each first tuning capacitor element in a second state provides substantially no capacitance between the first and second oscillating nodes; and

switching a state of a second tuning capacitor element in response to a second capacitor bank code, wherein the second tuning capacitor element is one of a second plurality of second tuning capacitor elements, wherein each second tuning capacitor element in a first state provides a second capacitance between the first oscillating node and the second oscillating node, and wherein each second tuning capacitor element in a second state provides substantially no capacitance between the first and second oscillating nodes.

9. The method of claim 8, wherein the first capacitance is less than a summed capacitance of each of the second plurality of second tuning capacitor elements when each of the second plurality of second tuning capacitor elements is in the first state.

10. The method of claim 8, further comprising:

generating the first capacitor bank code and the second capacitor bank code in response to a difference between an oscillation frequency of the oscillator and a target oscillation frequency.

11. The method of claim 8, further comprising:

decoding the first capacitor bank code to generate a first plurality of digital bits, wherein a digital bit of the first plurality determines the state of the first tuning capacitor element; and

decoding the second capacitor bank code to generate a second plurality of digital bits, wherein a digital bit of the second plurality determines the state of the second tuning capacitor element.

12. The method of claim 8, wherein the capacitance of each of the first plurality of first tuning capacitor elements and the capacitance of each of the second plurality of second tuning capacitor elements determines an oscillation frequency of a Voltage Controlled Oscillator (VCO).

13. The method of claim 12, wherein the oscillation frequency of the VCO ranges from 2.736 gigahertz to 3.127 gigahertz.

14. A computer program product, comprising:

a computer-readable medium comprising;

code for causing a computer to control a capacitance of a first thermometer-coded capacitor bank in response to a first capacitor bank code; and

code for causing the computer to control a capacitance of a second thermometer-coded capacitor bank in response to a second capacitor bank code, wherein the capacitance of the first thermometer-coded capacitor bank and the capacitance of the second thermometer-coded capacitor bank controls an oscillation frequency of a Voltage Controlled Oscillator (VCO).

15. The computer program product of claim 14, wherein the computer-readable medium further comprises:

code for causing the computer to receive an output signal of the VCO comprising the oscillation frequency of the VCO;

code for causing the computer to receive a channel selection signal;

code for causing the computer to generate an indication of the difference between the oscillation frequency and a target oscillation frequency associated with the channel selection signal; and

code for causing the computer to generate a digital word comprising a first capacitor bank code and a second capacitor bank code in response to the indication.

16. The computer program product of claim 14, wherein the first capacitor bank code addresses a first plurality of first tuning capacitor elements of the first thermometer-coded capacitor bank and the second capacitor bank code addresses a second plurality of second tuning capacitor elements of the second thermometer-coded tuning capacitor bank, wherein each of the first tuning capacitor elements provides a first capacitance value in an active state, and wherein each of the second tuning capacitor elements provides a second capacitance value in an active state.

17. The computer program product of claim 16, wherein the capacitance value of the second thermometer-coded capacitor bank is greater than the first capacitance value when each of the second tuning capacitor elements of the second thermometer-coded capacitor bank is active.

18. An oscillator comprising:

a first oscillating node;

a second oscillating node;

a first plurality of first tuning capacitor elements, wherein each first tuning capacitor element in a first state provides a first capacitance between the first and second oscillating nodes, and wherein each first tuning capacitor element in a second state provides substantially no capacitance between the first and second oscillating nodes;

a second plurality of second tuning capacitor elements, wherein each second tuning capacitor element in a first state provides a second capacitance between the first and second oscillating nodes, wherein each second tuning capacitor element in a second state provides substantially no capacitance between the first and second oscillating nodes; and

means for switching between the first state and the second state of each first tuning capacitor element and for switching between the first state and the second state of each second tuning capacitor element.

19. The oscillator of claim 18, wherein there is a number, Y, of second tuning capacitor elements, and wherein the product of Y and the second capacitance is greater than the first capacitance.

20. The apparatus of claim 18, wherein the means for switching comprises changing a digital word.