Self-trim and self-test of on-chip values
First Claim
Patent Images
1. A self-trim circuit, comprising:
- a) a circuit under trim (CUT) producing an analog signal and trimmed by a digital self-trim circuit;
b) a compare circuit to compare an output of the CUT to a reference signal;
c) said digital self-trim circuit receives and stores digital trim data to trim the CUT used to produce said output comparable to the reference signal, and said digital self-trim circuit controls said CUT to produce said output to match the reference signal to within a least significant bit (LSB) of the digital trim data, after which said digital circuit creates an offset to the compare circuit to verify the CUT trimmed to a value of the reference signal within the LSB.
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Abstract
A self-trim circuit provides a technique to trim a CUT (circuit under trim) using a LSB offset to determine the best digital value to trim the CUT. The self-trim circuit is also used to self-test the digital and analog portions of the self-trim circuitry, whereby the existence of a digital stuck at fault condition is detected. A state machine controls a digital stack to couple digital trim data to the CUT and read the output of a comparator circuit that signifies when a proper digital trim value has been used. Thereafter the proper digital trim value is stored into a nonvolatile memory.
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Citations
22 Claims
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1. A self-trim circuit, comprising:
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a) a circuit under trim (CUT) producing an analog signal and trimmed by a digital self-trim circuit; b) a compare circuit to compare an output of the CUT to a reference signal; c) said digital self-trim circuit receives and stores digital trim data to trim the CUT used to produce said output comparable to the reference signal, and said digital self-trim circuit controls said CUT to produce said output to match the reference signal to within a least significant bit (LSB) of the digital trim data, after which said digital circuit creates an offset to the compare circuit to verify the CUT trimmed to a value of the reference signal within the LSB. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A method of self-test and self-trim, comprising:
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a) self-testing a comparator circuit of self trim circuit contained within an integrated circuit device, wherein said self-testing further comprises; i) connecting a reference signal to both input of the comparator circuit; ii) applying first a positive, then a negative offset to the comparator circuit; and iii) reading an output of the comparator circuit with a state machine to detect change of state of the comparator circuit; b) self-trimming a circuit under trim (CUT) contained within said integrated circuit device, if the comparator circuit passes testing of step a), otherwise rejecting said integrated circuit device; c) loading a register stack with a plurality of digital trim values to trim the CUT to produce a specified output; d) coupling an output of the CUT to a first input of the comparator circuit and the reference signal to a second input of the comparator circuit; e) applying said digital trim values to the CUT, one after another, until output of said comparator circuit changes state;
thenf) applying a verification offset to the comparator circuit to again force output of said comparator circuit to change state and thereby verifying the self-trimming of the CUT is within the verification offset; and i) storing into a nonvolatile memory the digital trim value causing the state change in comparator circuit output. - View Dependent Claims (11, 12, 13, 14, 15, 16)
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17. An oscillator self trim circuit, comprising:
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a) a means for creating a digital signal when an output of a frequency generating circuit reaches a predetermined number of cycles; b) a means for comparing a first said digital signal created for an oscillator circuit under trim (CUT) and a second said digital signal created for a reference clock; c) a means for digitally adjusting and thereby trimming the frequency of the CUT, thereby forming a digital trim value for the CUT; d) a means for offsetting the start condition of said circuitry creating said second digital signal to verify said CUT output frequency trimmed to within said offset; and e) a means for storing the digital trim value. - View Dependent Claims (18, 19, 20, 21, 22)
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Specification