SENSOR WITH A CIRCUIT ARRANGEMENT
First Claim
1. A sensor more particularly for detecting attacks on at least one signal-carrying line (11, 21) more particularly of chip cards (1), comprising a circuit arrangement (10, 20) which comprises a first circuit arrangement (13, 22) for detecting an instantaneous voltage value above a first supply voltage and a second circuit arrangement (14, 23) for detecting an instantaneous voltage value below a second supply voltage, wherein, when a voltage value outside the range between the first and second supply voltages is detected, a signal (19) is generated on the basis of which a protective measure can be initiated.
10 Assignments
0 Petitions
Accused Products
Abstract
The invention relates to a sensor, in particular for detecting attacks on at least one signal-carrying line (11), in particular of chip cards (1), said sensor having a circuit arrangement (10) which comprises a first circuit arrangement (13) for detecting an instantaneous voltage value above a first supply voltage and a second circuit arrangement (14) for detecting an instantaneous voltage value below a second supply voltage, wherein, when a voltage value outside the range between the first and second supply voltages is detected, a signal (19) is generated and can be taken as a basis for initiating a protective measure.
6 Citations
6 Claims
- 1. A sensor more particularly for detecting attacks on at least one signal-carrying line (11, 21) more particularly of chip cards (1), comprising a circuit arrangement (10, 20) which comprises a first circuit arrangement (13, 22) for detecting an instantaneous voltage value above a first supply voltage and a second circuit arrangement (14, 23) for detecting an instantaneous voltage value below a second supply voltage, wherein, when a voltage value outside the range between the first and second supply voltages is detected, a signal (19) is generated on the basis of which a protective measure can be initiated.
-
6. A sensor as claimed in claim 6, characterized in that the two field effect transistors are interconnected by means of their drain electrodes.
Specification