SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

• US 20100301328A1
• Filed: 05/24/2010
• Published: 12/02/2010
• Est. Priority Date: 05/29/2009
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: AKIMOTO, Kengo, YAMAZAKI, Shunpei
• Granted Patent: US 8,872,171 B2
• Time in Patent Office: Days
• US Class Current: 257/43
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/1248 with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
• CPC Class Codes: H01L 29/24 including, apart from doping materials or other impurities, only semiconductor materials not provided for in groups H01L29/16, H01L29/18, H01L29/20, H01L29/22 including organic materials H10K99/00
• CPC Class Codes: H01L 29/247 Amorphous materials
• CPC Class Codes: H01L 29/4908 for thin film semiconductor, e.g. gate of TFT
• CPC Class Codes: H01L 29/513 the variation being perpendicular to the channel plane
• CPC Class Codes: H01L 29/78609 for preventing leakage current H01L29/78618 takes precedence
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 29/78693 the semiconducting oxide being amorphous
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621

Abstract

Homogeneity and stability of electric characteristics of a thin film transistor included in a circuit are critical for the performance of a display device including said circuit. An object of the invention is to provide an oxide semiconductor film with low hydrogen content and which is used in an inverted staggered thin film transistor having well defined electric characteristics. In order to achieve the object, a gate insulating film, an oxide semiconductor layer, and a channel protective film are successively formed with a sputtering method without being exposed to air. The oxide semiconductor layer is formed so as to limit hydrogen contamination, in an atmosphere including a proportion of oxygen. In addition, layers provided over and under a channel formation region of the oxide semiconductor layer are formed using compounds of silicon, oxygen and/or nitrogen.

Claims

1. A semiconductor device comprising:

a gate electrode over a substrate having an insulating surface;

a first insulating film over the gate electrode;

an oxide semiconductor layer over the first insulating film;

a second insulating film over the oxide semiconductor layer; and

a source electrode and a drain electrode over the second insulating film;

wherein the source electrode and the drain electrode are each electrically connected to the oxide semiconductor layer through an opening provided in the second insulating film,

wherein each of the the first insulating film and the second insulating film comprises silicon and at least one of oxygen and nitrogen elements, and

wherein a channel formation region of the oxide semiconductor layer is interposed between the first insulating film and the second insulating film.

2. The semiconductor device according to claim 1, wherein the oxide semiconductor layer comprises an oxide semiconductor film including at least Zn.

3. The semiconductor device according to claim 1, wherein the oxide semiconductor layer comprises silicon oxide.

4. The semiconductor device according to claim 1, wherein at least one of the first insulating film and the second insulating film comprises a silicon oxynitride film.

5. The semiconductor device according to claim 4, wherein the silicon oxynitride film includes nitrogen at a concentration greater than or equal to 3 atomic % and less than or equal to 30 atomic %.

6. The semiconductor device according to claim 1, wherein the first insulating film includes a halogen element at a concentration higher than or equal to 1×

10¹⁵ cm<sup>−

3</sup> and lower than or equal to 1×

10²⁰ cm<sup>−

3</sup>.

7. The semiconductor device according to claim 1, wherein a silicon nitride film or a silicon oxide film is provided between the gate electrode and the first insulating film.

8. The semiconductor device according to claim 1, wherein a buffer layer is provided between the oxide semiconductor layer and the source electrode or the drain electrode.

9. A semiconductor device comprising:

a gate electrode over a substrate having an insulating surface;

a first insulating film over the gate electrode;

an oxide semiconductor layer including silicon oxide over the first insulating film;

a second insulating film over the oxide semiconductor layer; and

a source electrode and a drain electrode over the second insulating film,

wherein the source electrode and the drain electrode are each electrically connected to the oxide semiconductor layer through an opening provided in the second insulating film,

wherein the first insulating film and the second insulating film each comprise silicon and at least one of oxygen and nitrogen elements, and

wherein a channel formation region of the oxide semiconductor layer is interposed between the first insulating film and the second insulating film.

10. The semiconductor device according to claim 9, wherein the oxide semiconductor layer comprises an oxide semiconductor film including at least Zn.

11. The semiconductor device according to claim 9, wherein a carrier concentration of the oxide semiconductor layer including silicon oxide is higher than or equal to 2.0×

10¹² cm<sup>−

3</sup> and lower than 1.6×

10¹⁹ cm<sup>−

3</sup>.

12. The semiconductor device according to claim 9, wherein Hall mobility of the oxide semiconductor layer including silicon oxide is higher than or equal to 1.8 cm²/Vs and lower than 15.1 cm²/Vs.

13. The semiconductor device according to claim 9, wherein at least one of the first insulating film and the second insulating film comprise a silicon oxynitride film.

14. The semiconductor device according to claim 9, wherein the silicon oxynitride film includes nitrogen at a concentration greater than or equal to 3 atomic % and less than or equal to 30 atomic %,

15. The semiconductor device according to claim 9, wherein the first insulating film includes a halogen element at a concentration higher than or equal to 1×

10¹⁵ cm<sup>−

3</sup> and lower than or equal to 1×

10²⁰ cm<sup>−

3</sup>.

16. The semiconductor device according to claim 9, wherein a silicon nitride film or a silicon oxide film is provided between the gate electrode and the first insulating film.

17. The semiconductor device according to claim 9, wherein a buffer layer is provided between the oxide semiconductor layer and the source electrode or the drain electrode.

18. A method for manufacturing a semiconductor device, comprising the steps of:

forming a gate electrode over a substrate having an insulating surface;

forming a first insulating film comprising a silicon oxynitride film over the gate electrode;

forming an oxide semiconductor layer over the first insulating film in an atmosphere comprising oxygen;

stacking a second insulating film comprising a silicon oxynitride film over the oxide semiconductor layer;

selectively etching the second insulating film to form a protective film;

selectively etching the oxide semiconductor layer with the use of the protective film as a mask to form an island-like semiconductor layer;

selectively etching part of the protective film to form a first and a second openings through the protective film;

forming a conductive film over the protective film and an exposed portion of the island-like semiconductor layer in the first and the second openings; and

selectively etching the conductive film to form a source electrode and a drain electrode.

19. The method for manufacturing a semiconductor device, according to claim 18, wherein at least one of the first insulating film and the second insulating film comprises nitrogen at a concentration greater than or equal to 3 atomic % and less than or equal to 30 atomic %.

20. The method for manufacturing a semiconductor device, according to claim 18, wherein a flow rate of oxygen during a step of forming an oxide semiconductor layer is greater than or equal to 50% and less than or equal to 100%.

21. The method for manufacturing a semiconductor device, according to claim 18, wherein the oxide semiconductor layer is formed with a sputtering method using a target including Zn.

22. The method for manufacturing a semiconductor device, according to claim 18, wherein the oxide semiconductor layer is formed with a sputtering method using a target including silicon oxide in a proportion greater than 0 weight % and less than or equal to 10 weight %.

23. The method for manufacturing a semiconductor device, according to claim 18, wherein the first insulating film, the oxide semiconductor layer, and the second insulating film are stacked without exposure to air.

24. The method for manufacturing a semiconductor device, according to claim 18, wherein the oxide semiconductor layer is formed with a sputtering method using a target including hydrogen at a concentration of 1×

10¹⁹ atoms/cm³ or lower.

25. The method for manufacturing a semiconductor device, according to claim 18, wherein the first insulating film is formed in an atmosphere including oxygen and nitrogen.

26. The method for manufacturing a semiconductor device, according to claim 18, wherein the second insulating film is formed in an atmosphere including oxygen and nitrogen.

27. A method for manufacturing a semiconductor device, comprising the steps of:

forming a gate electrode over a substrate having an insulating surface;

forming a first insulating film comprising silicon and at least one of nitride and oxygen over the gate electrode;

forming an oxide semiconductor layer over the first insulating film in an atmosphere comprising oxygen;

stacking a second insulating film comprising silicon and at least one of nitride and oxygen over the oxide semiconductor layer; and

forming a source electrode and a drain electrode over the second insulating film,

wherein the source electrode and the drain electrode are in contact with the oxide semiconductor layer through at least one opening in the second insulating film.

28. The method for manufacturing a semiconductor device, according to claim 27, wherein the first insulating film, the oxide semiconductor layer, and the second insulating film are stacked without exposure to air.

29. The method for manufacturing a semiconductor device, according to claim 27, wherein a flow rate of oxygen during a step of forming an oxide semiconductor layer is greater than or equal to 50% and less than or equal to 100%.

30. The method for manufacturing a semiconductor device, according to claim 27, wherein the oxide semiconductor layer is formed with a sputtering method using a target including silicon oxide in a proportion greater than 0 weight % and less than or equal to 10 weight %.