SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR

• US 20100301410A1
• Filed: 08/13/2009
• Published: 12/02/2010
• Est. Priority Date: 09/30/2008
• Status: Active Grant

• Current Assignee: Infineon Technologies Austria Ag (Infineon Technologies AG)
• Original Assignee: Infineon Technologies Austria Ag (Infineon Technologies AG)
• Inventors: Hirler, Franz
• Granted Patent: US 8,203,181 B2
• Time in Patent Office: Days
• US Class Current: 257/334
• CPC Class Codes: H01L 21/26586 characterised by the angle between the ion beam and the crystal planes or the main crystal surface
• CPC Class Codes: H01L 29/0623 Buried supplementary region, e.g. buried guard ring multi-RESURF H01L29/0634
• CPC Class Codes: H01L 29/0834 Anode regions of thyristors or gated bipolar-mode devices, e.g. supplementary regions surrounding anode regions
• CPC Class Codes: H01L 29/086 Impurity concentration or distribution
• CPC Class Codes: H01L 29/0878 Impurity concentration or distribution
• CPC Class Codes: H01L 29/1095 Body region, i.e. base region, of DMOS transistors or IGBTs cell layout H01L29/0696
• CPC Class Codes: H01L 29/404 Multiple field plate structures
• CPC Class Codes: H01L 29/407 Recessed field plates, e.g. trench field plates, buried field plates
• CPC Class Codes: H01L 29/41766 with at least part of the source or drain electrode having contact below the semiconductor surface, e.g. the source or drain electrode formed at least partially in a groove or with inclusions of conductor inside the semiconductor H01L29/41733 - H01L29/41758 take precedence
• CPC Class Codes: H01L 29/42368 the thickness being non-uniform
• CPC Class Codes: H01L 29/495 the conductor material next to the insulator being a simple metal, e.g. W, Mo H01L29/4908, H01L29/4983 take precedence
• CPC Class Codes: H01L 29/4966 the conductor material next to the insulator being a composite material, e.g. organic material, TiN, MoSi2 H01L29/4908, H01L29/4983 take precedence
• CPC Class Codes: H01L 29/66727 with a step of recessing the source electrode
• CPC Class Codes: H01L 29/66734 with a step of recessing the gate electrode, e.g. to form a trench gate electrode
• CPC Class Codes: H01L 29/7397 and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT
• CPC Class Codes: H01L 29/7803 structurally associated with at least one other device assemblies H01L25/00; integrated circuits H01L27/00
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236

Abstract

A semiconductor device having a semiconductor body, a source metallization arranged on a first surface of the semiconductor body and a trench including a first trench portion and a second trench portion and extending from the first surface into the semiconductor body is provided. The semiconductor body further includes a pn-junction formed between a first semiconductor region and a second semiconductor region. The first trench portion includes an insulated gate electrode which is connected to the source metallization, and the second trench portion includes a conductive plug which is connected to the source metallization and to the second semiconductor region.

Claims

1. A semiconductor device comprising:

a semiconductor body comprising a first surface, a first semiconductor region of a first conductivity type and a second semiconductor region of a second conductivity type, the first semiconductor region and the second semiconductor region forming a pn-junction;

a source metallization arranged on the first surface; and

a trench extending from the first surface into the semiconductor body and comprising, in a horizontal plane substantially parallel to the first surface, a first trench portion and a second trench portion; and

the first trench portion comprising a gate electrode connected to the source metallization and an insulating layer that insulates the gate electrode from the second semiconductor region;

the second trench portion comprising a conductive plug which is connected to the source metallization and to the second semiconductor region.

2. The semiconductor device of claim 1, wherein the first trench portion and the second trench portion form a simply connected trench.

3. The semiconductor device of claim 1, wherein the semiconductor device comprises a plurality of first trench portions and second trench portions which are, in a horizontal direction, arranged in a regular pattern.

4. The semiconductor device of claim 1, wherein the first trench portion comprises a first vertical depth;

and wherein the second trench portion comprises a second vertical depth which is lower than the first vertical depth.

5. The semiconductor device of claim 1, wherein the first semiconductor region forms a source region which is connected to the source metallization and extends to the first surface;

wherein the second semiconductor region forms a body region;

wherein the semiconductor body further comprises a drift region of the first conductivity type adjacent to the body region; and

wherein the first trench portion and the second trench portion extend through the source region and at least partially into the body region.

6. The semiconductor device of claim 5, wherein the semiconductor body further comprises a body contact region of the second conductivity type which provides an electrical connection between the body region and the conductive plug of the second trench portion;

wherein the body region comprises a first doping concentration; and

wherein the body contact region comprises a second doping concentration which is higher than the first doping concentration.

7. The semiconductor device of claim 5, wherein the semiconductor device further comprises at least one additional field effect structure which is selected from a group consisting of a lateral MOSFET, a UMOSFET, a DMOSFET, a Superjunction-MOSFET or an reverse conducting IGBT.

8. The semiconductor device of claim 5, further comprising an additional field effect structure which comprises an additional gate electrode and a first capacitance formed between the additional gate electrode and the body region and comprising a first capacitance per unit area;

and wherein the gate electrode, the insulating layer and the body region form a second capacitance comprising a second capacitance per unit area which is larger than the first capacitance per unit area.

9. A semiconductor device comprising:

a source metallization;

a field-effect structure comprising a source region of a first conductivity type connected to the source metallization, a body region of a second conductivity type adjacent to the source region, a drift region of the first conductivity type adjacent to the body region and a first insulated gate electrode; and

a trench comprising a first trench portion and a second trench portion, the first trench portion comprising a second insulated gate electrode insulated from the body region and connected to the source metallization;

the second trench portion comprising a conductive plug electrically connecting the source metallization with the body region.

10. The semiconductor device of claim 9, further comprising a body contact region of the second conductivity type which adjoins the body region and a lower part of the second trench portion;

wherein the body region has a first doping concentration; and

wherein the body contact region has a second doping concentration which is higher than the first doping concentration.

11. The semiconductor device of claim 10, wherein the body contact regions are embedded within the body region.

12. The semiconductor device of claim 9, wherein the body region and the drift region form a body diode of the field-effect structure;

and wherein the second insulated gate electrode forms the gate electrode of a MOS-gated diode connected in parallel to at least one of the body diode and the field-effect structure.

13. A power semiconductor device comprising:

a source metallization;

a field-effect structure comprising a source region of a first conductivity type connected to the source metallization, a body region of a second conductivity type adjacent to the source region, a drift region of the first conductivity type adjacent to the body region and a first trench comprising an insulated gate electrode; and

a second trench comprising a first trench portion and a second trench portion, the first trench portion comprising a second gate electrode connected to the source metallization and an insulating layer configured to insulate the second gate electrode from the body region;

the second trench portion comprising a conductive plug electrically connecting the source metallization with the body region.

14. The power semiconductor device of claim 13, wherein the body region comprises a first doping concentration;

and wherein the power semiconductor device further comprises a third conductive region of the second conductivity type which adjoins the body region and the conductive plug, the third conductive region comprising a second doping concentration which is higher than the first doping concentration.

15. The power semiconductor device of claim 13, further comprising a fourth semiconductor region adjoining the drift region, the body region and the insulating layer;

wherein the fourth semiconductor region is selected from a group consisting of a semiconductor region of the first conductivity type and a weakly doped semiconductor region of the second conductivity type.

16. The power semiconductor device of claim 13, wherein the conductive plug and the second gate electrode are formed by a common conductive structure.

17. A method for forming a semiconductor device comprising:

providing a semiconductor body comprising a first surface, a first semiconductor region of a first conductivity type and a second semiconductor region of a second conductivity type, the first semiconductor region and the second semiconductor region forming a pn-junction;

forming a trench such that the trench extends from the first surface into the semiconductor body and comprises, in a horizontal plane substantially parallel to the first surface, a first trench portion and second trench portion;

forming a gate electrode and an insulating layer which insulates the gate electrode from the second semiconductor region in the first trench portion;

forming a conductive plug in the second trench portion such that the conductive plug is connected with the second semiconductor region; and

forming a source metallization on the first surface such that the source metallization is connected to the gate electrode and the conductive plug.

18. The method of claim 17, wherein the first semiconductor region comprises a first doping concentration;

further comprising;

forming a third semiconductor region of the second conductivity type such that the third semiconductor region adjoins the second semiconductor region, is electrically connected to the conductive plug and comprises a doping concentration which is higher than the first doping concentration.

19. A semiconductor device comprising:

a source metallization;

a first field-effect structure including a source region of a first conductivity type, the source region being electrically connected to the source metallization;

a body region of a second conductivity type adjacent to the source region;

a first gate electrode and a first insulating region arranged at least between the first gate electrode and the body region, the first gate electrode, the first insulating region and the body region forming a first capacitance, the first capacitance having a first capacitance per unit area;

a second field-effect structure including a source region of the first conductivity type;

a body region of the second conductivity type adjacent to the source region;

an electrode structure and a second insulating region which is, in a first vertical cross-section, arranged at least between the electrode structure and the body region, the source region and the electrode structure being electrically connected to the source metallization;

the electrode structure, the second insulating region and the body region forming a second capacitance, the second capacitance having a second capacitance per unit area; and

the second capacitance per unit area being larger than the first capacitance per unit area.

20. The semiconductor device of claim 19, further comprising a body contact region of the second conductivity type which adjoins, in a second vertical cross-section, the electrode structure and the body region of at least one of the first field-effect structure and the second field-effect structure;

wherein the body region to which the body contact region adjoins has a first doping concentration; and

wherein the body contact region has a second doping concentration which is higher than the first doping concentration.

21. The semiconductor device of claim 19, further comprising a common drift region of the first conductivity type;

the common drift region forming a pn-junction with the body regions of the first field-effect structure and the second field-effect structure;

wherein the body region of the first field effect structure and the common drift region form a body diode;

wherein the second field effect structure forms a MOS-gated diode (MGD) connected in parallel to at least one of the body diode and the first field-effect structure;

wherein the total current through the semiconductor device in forward biasing of the body diode is dominated by an unipolar current above an average current flow density in the drift region; and

wherein the average current flow density is about 1 mA/mm².

22. The semiconductor device of claim 19, comprising a plurality of first field-effect structures and second field-effect structures, wherein at least a part of the plurality of first field-effect structures and second field-effect structures are arranged in a regular pattern.

23. The semiconductor device of claim 19, wherein the body region of the first field-effect structure includes a first body sub-region adjoining the first insulating region;

wherein the body region of the second field-effect structure includes a second body sub-region adjoining the second insulating region; and

wherein the doping concentration of the second body sub-region is lower than the doping concentration of the first body sub-region.

24. The semiconductor device of claim 19, wherein at least one of the first field-effect structures further includes at least one field plate electrically connected to the source metallization.

25. The semiconductor device of claim 19, wherein the first gate electrode includes a material having a first work function, and wherein the second gate electrode includes a material having a second work function which is smaller than the first work function.