Systems and Methods for Managing End of Life in a Solid State Drive

• US 20100306577A1
• Filed: 05/28/2009
• Published: 12/02/2010
• Est. Priority Date: 05/28/2009
• Status: Active Grant

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: LSI Corporation (Broadcom, Inc.)
• Inventors: McKean, Brian, Warren, Robert W., Dreifus, David L.
• Granted Patent: US 8,176,367 B2
• Time in Patent Office: Days
• US Class Current: 714/6
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 2212/7208 Multiple device management, e.g. distributing data over multiple flash devices
• CPC Class Codes: G11C 16/349 Arrangements for evaluating degradation, retention or wearout, e.g. by counting erase cycles
• CPC Class Codes: G11C 29/76 using address translation or modifications

Abstract

Various embodiments of the present invention provide systems and methods for managing solid state drives. As an example, a storage system is described that include at least a first flash memory block and a second flash memory block, and a control circuit. The first flash memory block and the second flash memory block are addressable in the storage system. The control circuit is operable to identify the first flash memory block as partially failed, receive a write request directed to the first flash memory block; and direct the write request to the second flash memory block.

Claims

1. A storage system, the storage system comprising:

a first non-volatile memory portion and a second non-volatile memory portion, wherein the first non-volatile memory portion and the second non-volatile memory portion are addressable in the storage system;

a control circuit, wherein the control circuit is operable to;

identify the first non-volatile memory portion as partially failed;

receive a write request directed to the first non-volatile memory portion; and

direct the write request to the second non-volatile memory portion.

2. The storage system of claim 1, wherein the control circuit is further operable to:

receive a read request directed to the first non-volatile memory portion; and

direct the read request to the first non-volatile memory where the read request is received prior to directing the write request to the second non-volatile memory.

3. The storage system of claim 1, wherein the first non-volatile memory portion is included in a first solid state drive, wherein the second non-volatile memory portion is included in a second solid state drive, and wherein the control circuit is included in a system controller that is communicably coupled to the first solid state drive and the second solid state drive.

4. The storage system of claim 3, wherein the control circuit receives a write prohibit signal from the first solid state drive, and wherein identifying the first non-volatile memory portion as partially failed is based at least in part on the write prohibit signal, and includes identifying the first solid state drive as partially failed.

5. The storage system of claim 4, wherein the control circuit is a first control circuit, wherein the first solid state drive includes a second control circuit, and wherein the second control circuit includes:

an unreliable block identification circuit, wherein the unreliable block identification circuit is operable to determine that the first non-volatile memory portion is unreliable; and

a partial failure indication circuit, wherein the partial failure indication circuit is operable to assert the write prohibit signal upon determination that an insufficient number of memory portions in the first solid state drive remain reliable.

6. The storage system of claim 1, wherein the first non-volatile memory portion is included in a first solid state drive, wherein the second non-volatile memory portion is included in a second solid state drive, wherein the control circuit is included in a system controller that is communicably coupled to the first solid state drive and the second solid state drive, wherein the control circuit is operable to identify an estimated end of life of the first solid state drive, wherein the control circuit receives a write prohibit signal from the first solid state drive, wherein identifying the first non-volatile memory portion as partially failed is based at least in part on the write prohibit signal, and wherein the control circuit is operable to assure that all data from the first solid state drive is transferred to the second solid state drive before the estimated end of life.

7. The storage system of claim 6, wherein the control circuit is a first control circuit, wherein the first solid state drive includes a second control circuit, and wherein the second control circuit includes:

an unreliable block identification circuit, wherein the unreliable block identification circuit is operable to determine that the first non-volatile memory portion is unreliable;

a partial failure indication circuit, wherein the partial failure indication circuit is operable to assert the write prohibit signal upon determination that an insufficient number of memory portions in the first solid state drive remain reliable;

a time stamp circuit, wherein the time stamp circuit is operable to identify a first point in time when the partial failure indication circuit asserted the write prohibit signal; and

an end of life indication circuit, wherein the end of life indication circuit is operable to estimate a second point in time based at least in part on the first point in time, wherein the second point in time is the estimated end of life of the first solid state drive.

8. The storage system of claim 1, wherein the control circuit is implemented in a system control unit, wherein the system control unit includes a plurality of interfaces, wherein a first replaceable memory device includes the first non-volatile memory portion and is installed in a first of the plurality of interfaces, and wherein a second replaceable memory device includes the second non-volatile memory portion and is installed in a second of the plurality of interfaces.

9. The storage system of claim 8, wherein the plurality of interfaces are selected from a group consisting of:

USB interfaces, DIMM interfaces, and a combination of DIMM interfaces and USB interfaces.

10. The storage system of claim 1, wherein the first memory portion, the second non-volatile memory portion, and the control circuit are implemented in a single non-volatile memory device.

11. A method for managing the end of life of a non-volatile memory device, the method comprising:

providing a first non-volatile memory portion;

providing a second non-volatile memory portion;

determining that the first non-volatile memory portion is becoming unreliable;

based at least in part on the determination of unreliability, identifying the first non-volatile memory portion as read only; and

mapping the second non-volatile memory portion to the first non-volatile memory portion.

12. The method of claim 11, wherein the method further comprises:

receiving a write request directed to the first non-volatile memory portion; and

directing the write request to the second non-volatile memory portion.

13. The method of claim 11, wherein the method further comprises:

receiving a read request directed to the first non-volatile memory portion; and

satisfying the read request to the first non-volatile memory portion.

14. The method of claim 11, wherein the first non-volatile memory portion is included in a first solid state drive, wherein the second non-volatile memory portion is included in a second solid state drive, and wherein the control circuit is included in a system controller that is communicably coupled to the first solid state drive and the second solid state drive.

15. The method of claim 14, wherein the control circuit is a first control circuit, wherein the first solid state drive includes a second control circuit, and wherein the second control circuit includes:

an unreliable block identification circuit, wherein the unreliable block identification circuit is operable to determine that the first non-volatile memory portion is unreliable; and

a partial failure indication circuit, wherein the partial failure indication circuit is operable to assert the write prohibit signal upon determination that an insufficient number of memory portions in the first solid state drive remain reliable.

16. The method of claim 14, wherein the method further comprises:

estimating an end of life of the first solid state drive; and

transferring all data from the first solid state drive to the second solid state drive before the estimated end of life of the first solid state drive.

17. The method of claim 16, wherein estimating the end of life of the first solid state drive includes:

determining a point in time corresponding to the determination of unreliability; and

adding a fixed time increment to the point in time to yield the estimated end of life.

18. The method of claim 11, wherein the method further includes:

providing a third non-volatile memory portion, wherein the third non-volatile memory portion includes write-once, read many data; and

transferring the write-once, read many data to the first memory portion.

19. The method of claim 11, wherein the control circuit is implemented in a system control unit, wherein the system control unit includes a plurality of interfaces, wherein a first replaceable memory device includes the first non-volatile memory portion and is installed in a first of the plurality of interfaces, and wherein a second replaceable memory device includes the second non-volatile memory portion and is installed in a second of the plurality of interfaces.

20. The method of claim 19, wherein the method further comprises:

removing the first replaceable memory device after data from the first replaceable memory device has been moved to the second replaceable memory device; and

installing a third replaceable memory device in the first of the plurality of interfaces.