Heterojunction III-V Photovoltaic Cell Fabrication
First Claim
1. A method for forming a heterojunction III-V photovoltaic (PV) cell, the method comprising:
- performing layer transfer of a base layer from a wafer of a III-V substrate, the base layer being less than about 20 microns thick;
forming an intrinsic layer on the base layer;
forming an amorphous silicon layer on the intrinsic layer; and
forming a transparent conducting oxide layer on the amorphous silicon layer.
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Abstract
A method for forming a heterojunction III-V photovoltaic (PV) cell includes performing layer transfer of a base layer from a wafer of a III-V substrate, the base layer being less than about 20 microns thick; forming an intrinsic layer on the base layer; forming an amorphous silicon layer on the intrinsic layer; and forming a transparent conducting oxide layer on the amorphous silicon layer. A heterojunction III-V photovoltaic (PV) cell includes a base layer comprising a III-V substrate, the base layer being less than about 20 microns thick; an intrinsic layer located on the base layer; an amorphous silicon layer located on the intrinsic layer; and a transparent conducting oxide layer located on the amorphous silicon layer.
364 Citations
20 Claims
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1. A method for forming a heterojunction III-V photovoltaic (PV) cell, the method comprising:
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performing layer transfer of a base layer from a wafer of a III-V substrate, the base layer being less than about 20 microns thick; forming an intrinsic layer on the base layer; forming an amorphous silicon layer on the intrinsic layer; and forming a transparent conducting oxide layer on the amorphous silicon layer. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 11, 12)
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10. The method of claim 10, wherein the second amorphous silicon layer comprises a doping type that is the same as a doping type of the substrate, and the second amorphous silicon layer is configured to act as a back surface field.
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13. A heterojunction III-V photovoltaic (PV) cell, comprising:
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a base layer comprising a III-V substrate, the base layer being less than about 20 microns thick; an intrinsic layer located on the base layer; an amorphous silicon layer located on the intrinsic layer; and a transparent conducting oxide layer located on the amorphous silicon layer. - View Dependent Claims (14, 15, 16, 17, 18, 19, 20)
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Specification