Dual-Output Triple-Vdd Charge Pump

• US 20100308899A1
• Filed: 06/04/2009
• Published: 12/09/2010
• Est. Priority Date: 06/04/2009
• Status: Abandoned Application

• Current Assignee: Pericom Semiconductor Corporation (Diodes Incorporated)
• Original Assignee: Pericom Semiconductor Corporation (Diodes Incorporated)
• Inventors: Wong, Anthony Yap
• Application Number:
  US12/478,674
• Publication Number:
  US 20100308899A1
• Time in Patent Office: Days
• US Class Current: 327/536
• CPC Class Codes: H02M 1/009 having two or more independently controlled outputs for DC-DC converter with intermediate AC H02M3/33561
• CPC Class Codes: H02M 3/073 Charge pumps of the Schenkel-type

Abstract

A dual-output triple-Vdd charge pump as two pumped outputs that are both pumped to three times the power-supply voltage, 3×Vdd. This pumped output voltage is reduced by two p-channel inner diode drops, to 3×Vdd−2×|Vtp|. A pair of cross-coupled n-channel transistors alternately charge two inner nodes from the power supply. Inner pumping capacitors drive inner nodes between Vdd and 2×Vdd, and the cross-coupling of the gates turns off one of the cross-coupled n-channel transistors when its inner node is being driven high. A p-channel inner diode transistor connects an inner node to an outer node, causing a |Vtp| drop. The outer node is also pumped by an outer pumping capacitor that drives the outer node between 2×Vdd−|Vtp| and 3×Vdd−|Vtp|. A p-channel outer diode transistor conducts from the outer node to the pumped output node, causing another |Vtp| voltage drop. The pumped output voltage is maintained at 3×Vdd−2×|Vtp| by an output capacitor.

Claims

1. A dual-output triple-Vdd charge pump comprising:

a first cross-coupled transistor having a first gate connected to a first inner node for conducting current from a power supply to a second inner node;

a second cross-coupled transistor having a second gate connected to the second inner node for conducting current from the power supply to the first inner node;

a first inner pumping capacitor coupled to the first inner node, being driven by a first clock;

a second inner pumping capacitor coupled to the second inner node, being driven by a second clock;

a first inner diode coupled to conduct current between the first inner node and a first outer node, and for preventing back current flow from the first outer node to the first inner node;

a first outer pumping capacitor coupled to the first outer node, being driven by the second clock; and

a first outer diode coupled to conduct current between the first outer node and a first output node, and for preventing back current flow from the first output node to the first outer node.

2. The dual-output triple-Vdd charge pump of claim 1 further comprising:

a second inner diode coupled to conduct current between the second inner node and a second outer node, and for preventing back current flow from the second outer node to the second inner node;

a second outer pumping capacitor coupled to the second outer node, being driven by the first clock; and

a second outer diode coupled to conduct current between the second outer node and a second output node, and for preventing back current flow from the second output node to the second outer node,

whereby two outputs are generated.

3. The dual-output triple-Vdd charge pump of claim 2 wherein the first cross-coupled transistor is an n-channel transistor;

wherein the second cross-coupled transistor is an n-channel transistor.

4. The dual-output triple-Vdd charge pump of claim 3 wherein a bulk node of the first cross-coupled transistor is grounded;

wherein a bulk node of the second cross-coupled transistor is grounded.

5. The dual-output triple-Vdd charge pump of claim 4 wherein the first inner diode is a p-channel transistor having a gate connected to the first outer node;

wherein the second inner diode is a p-channel transistor having a gate connected to the second outer node;

wherein the first outer diode is a p-channel transistor having a gate connected to the first output node;

wherein the second outer diode is a p-channel transistor having a gate connected to the second output node.

6. The dual-output triple-Vdd charge pump of claim 5 wherein a substrate of the first inner diode is connected to the first outer node;

wherein a substrate of the second inner diode is connected to the second outer node.

7. The dual-output triple-Vdd charge pump of claim 6 wherein a substrate of the first outer diode is connected to the first output node;

wherein a substrate of the second outer diode is connected to the second output node.

8. The dual-output triple-Vdd charge pump of claim 2 wherein the first clock and the second clock are inverses of each other;

wherein the first clock and the second clock swing from a ground supply to a power supply voltage of the power supply.

9. The dual-output triple-Vdd charge pump of claim 2 wherein the first inner node is pumped by the first inner pumping capacitor to double the power supply voltage;

wherein the second inner node is pumped by the second inner pumping capacitor to double the power supply voltage;

wherein the first outer node is pumped by the first outer pumping capacitor to triple the power supply voltage minus a voltage drop through the first inner diode and minus parasitic voltage losses;

wherein the first output node has a maximum voltage of triple the power supply voltage minus a voltage drop through the first inner diode and minus a voltage drop through the first outer diode and minus parasitic voltage losses;

wherein the second outer node is pumped by the second outer pumping capacitor to triple the power supply voltage minus a voltage drop through the second inner diode and minus parasitic voltage losses;

wherein the second output node has a maximum voltage of triple the power supply voltage minus a voltage drop through the second inner diode and minus a voltage drop through the second outer diode and minus parasitic voltage losses.

10. A charge pump circuit comprising:

a first cross-coupled transistor having a source connected to a power supply, a drain connected to a first inner node, and a gate connected to a second inner node;

a second cross-coupled transistor having a source connected to the power supply, a drain connected to the second inner node, and a gate connected to the first inner node;

a first inner pumping capacitor coupled between the first inner node and a first clock;

a second inner pumping capacitor coupled between the second inner node and a second clock;

a first inner diode coupled between the first inner node and a first outer node, for allowing current to flow to the first outer node and for preventing reverse current flow to the first inner node;

a first outer pumping capacitor coupled between the first outer node and a second clock; and

a first outer diode coupled between the first outer node and a first output node, for allowing current to flow to the first output node and for preventing reverse current flow to the first outer node.

11. The charge pump circuit of claim 10 further comprising:

a second inner diode coupled between the second inner node and a second outer node, for allowing current to flow to the second outer node and for preventing reverse current flow to the second inner node;

a second outer pumping capacitor coupled between the second outer node and the first clock; and

a second outer diode coupled between the second outer node and a second output node, for allowing current to flow to the second output node and for preventing reverse current flow to the second outer node.

12. The charge pump circuit of claim 11 wherein a substrate node of the first cross-coupled transistor is connected to a ground;

wherein a substrate node of the second cross-coupled transistor is connected to a ground.

13. The charge pump circuit of claim 12 wherein the first cross-coupled transistor is an n-channel transistor;

wherein the second cross-coupled transistor is an n-channel transistor.

14. The charge pump circuit of claim 13 wherein the first inner diode comprises a p-channel transistor having a gate, a drain, and a substrate connected to the first outer node and a source connected to the first inner node;

wherein the first outer diode comprises a p-channel transistor having a gate, a drain, and a substrate connected to the first output node and a source connected to the first outer node.

15. The charge pump circuit of claim 14 wherein the second inner diode comprises a p-channel transistor having a gate, a drain, and a substrate connected to the second outer node and a source connected to the second inner node;

wherein the second outer diode comprises a p-channel transistor having a gate, a drain, and a substrate connected to the second output node and a source connected to the second outer node.

16. The charge pump circuit of claim 15 further comprising:

an inverter coupled between the first clock and the second clock;

wherein the first clock and the second clock are inverses of each other.

17. A cross-coupled charge-pump circuit comprising:

first n-channel cross-coupled transistor means, having a first gate connected to a first inner node, for conducting current from a power supply to a second inner node in response to the first gate;

second n-channel cross-coupled transistor means, having a second gate connected to the second inner node, for conducting current from the power supply to the first inner node in response to the second gate;

first inner pumping capacitive coupling means, coupled to the first inner node, for pumping a voltage of the first inner node in response to a first clock;

second inner pumping capacitive coupling means, coupled to the second inner node, for pumping a voltage of the second inner node in response to a second clock;

first inner diode means for conducting current between the first inner node and a first outer node, and for preventing back current flow from the first outer node to the first inner node;

first outer pumping capacitive coupling means, coupled to the first outer node, for pumping a voltage of the first outer node in response to the second clock; and

first outer diode means for conducting current between the first outer node and a first output node, and for preventing back current flow from the first output node to the first outer node.

18. The cross-coupled charge-pump circuit of claim 17 further comprising:

second inner diode means for conducting current between the second inner node and a second outer node, and for preventing back current flow from the second outer node to the second inner node;

second outer pumping capacitive coupling means, coupled to the second outer node, for pumping a voltage of the second outer node in response to the first clock; and

second outer diode means for conducting current between the second outer node and a second output node, and for preventing back current flow from the second output node to the second outer node,

whereby two outputs are generated.

19. The cross-coupled charge-pump circuit of claim 18 wherein the first inner diode means comprises a p-channel transistor means having a gate connected to the first outer node;

wherein the second inner diode means comprises a p-channel transistor means having a gate connected to the second outer node;

wherein the first outer diode means comprises a p-channel transistor means having a gate connected to the first output node;

wherein the second outer diode means comprises a p-channel transistor means having a gate connected to the second output node.

20. The cross-coupled charge-pump circuit of claim 19 wherein a bulk node of the first n-channel cross-coupled transistor means is grounded;

wherein a bulk node of the second n-channel cross-coupled transistor means is grounded;

wherein a substrate of the first inner diode means is connected to the first outer node;

wherein a substrate of the second inner diode means is connected to the second outer node;

wherein a substrate of the first outer diode means is connected to the first output node;

wherein a substrate of the second outer diode means is connected to the second output node.