IMAGE SENSORS AND COLOR FILTER ARRAYS FOR CHARGE SUMMING AND INTERLACED READOUT MODES

• US 20100309351A1
• Filed: 06/08/2009
• Published: 12/09/2010
• Est. Priority Date: 06/08/2009
• Status: Active Grant

• Current Assignee: Aptina Imaging Corporation (ON Semiconductor Corporation)
• Original Assignee: Aptina Imaging Corporation (ON Semiconductor Corporation)
• Inventors: Smith, Scott, Ladd, John
• Granted Patent: US 8,350,940 B2
• Time in Patent Office: Days
• US Class Current: 348/280
• CPC Class Codes: H04N 23/843 Demosaicing, e.g. interpolating colour pixel values
• CPC Class Codes: H04N 25/00 Circuitry of solid-state image sensors [SSIS]; Control thereof
• CPC Class Codes: H04N 25/134 based on three different wavelength filter elements
• CPC Class Codes: H04N 25/46 by combining or binning pixels

Abstract

Image sensors and color filter arrays for in-pixel charge summing and interlaced readout modes may be provided. An image sensor that supports charge summing and interlaced readout modes may include an array of pixels with pairs of adjacent green, red, and blue light-sensitive pixels. An image sensor may implement an in-pixel charge summing readout mode in which charges from pairs of pixels are summed onto a common node and then read out from the common node. An image sensor may implement an interlaced readout mode in which image data is read out from alternating rows of the image sensor. An image sensor may use a shared readout scheme in which a group of four pixels is formed from two pairs of commonly-colored pixels. The four pixels may share circuitry such as a reset transistor, a buffer transistor, and a row select transistor and may connect to a single readout line.

Claims