LONG WAVELENGTH NONPOLAR AND SEMIPOLAR (Al,Ga,In)N BASED LASER DIODES

• US 20100309943A1
• Filed: 06/07/2010
• Published: 12/09/2010
• Est. Priority Date: 06/05/2009
• Status: Abandoned Application

• Current Assignee: Regents of the University of California (University of California)
• Original Assignee: Regents of the University of California (University of California)
• Inventors: DenBaars, Steven P., Nakamura, Shuji, Chakraborty, Arpan, Lin, You-Da
• Application Number:
  US12/795,360
• Publication Number:
  US 20100309943A1
• Time in Patent Office: Days
• US Class Current: 372/45.012
• CPC Class Codes: B82Y 20/00 Nanooptics, e.g. quantum optics or photonic crystals
• CPC Class Codes: H01S 5/2009 by using electron barrier layers
• CPC Class Codes: H01S 5/2022 Absorbing region or layer parallel to the active layer, e.g. to influence transverse modes
• CPC Class Codes: H01S 5/2031 characterized by special waveguide layers, e.g. asymmetric waveguide layers or defined bandgap discontinuities
• CPC Class Codes: H01S 5/22 having a ridge or stripe structure
• CPC Class Codes: H01S 5/320275 semi-polar orientation
• CPC Class Codes: H01S 5/3213 asymmetric clading layers
• CPC Class Codes: H01S 5/3216 quantum well or superlattice cladding layers
• CPC Class Codes: H01S 5/34333 with a well layer based on Ga(In)N or Ga(In)P, e.g. blue laser

Abstract

A laser diode, grown on a miscut nonpolar or semipolar substrate, with lower threshold current density and longer stimulated emission wavelength, compared to conventional laser diode structures, wherein the laser diode'"'"'s (1) n-type layers are grown in a nitrogen carrier gas, (2) quantum well layers and barrier layers are grown at a slower growth rate as compared to other device layers (enabling growth of the p-type layers at higher temperature), (3) high Al content electron blocking layer enables growth of layers above the active region at a higher temperature, and (4) asymmetric AlGaN SPSLS allowed growth of high Al containing p-AlGaN layers. Various other techniques were used to improve the conductivity of the p-type layers and minimize the contact resistance of the contact layer.

Claims

1. A method of fabricating a III-nitride laser diode (LD) structure, comprising:

growing one or more III-nitride device layers for a LD on an off-axis surface of a nonpolar or semipolar III-nitride substrate.

2. The method of claim 1, wherein the surface is off-axis by −

1 or +1 degree with respect to an m-plane of the substrate, and towards a c direction of the substrate.

3. The method of claim 1, wherein the surface is off-axis by more than −

1 or +1 degree with respect to an m-plane of the substrate, and towards a c direction of the substrate.

4. The method of claim 2, further comprising using 100% nitrogen carrier gas at atmospheric pressure to grow the one or more device layers on the off-axis surface of the substrate, resulting in the device layers having smooth surface morphology free of pyramidal hillocks observed in device layers grown on nominally on-axis m-plane GaN substrates.

5. The method of claim 1, wherein the device layers comprise all of the LD structure'"'"'s n-type layers.

6. The method of claim 5, wherein the n-type layers further comprise a silicon-doped n-type AlGaN/GaN superlattice, resulting in smooth interfaces and excellent structural properties for the LD structure, as compared to device layers grown without using 100% nitrogen carrier gas.

7. The method of claim 1, wherein growing the device layers further comprises growing one or more quantum wells at a first growth rate of more than 0.3 Angstroms per second and less than 0.7 Angstroms per second, and slower than a growth rate used for other layers in the LD structure.

8. The method of claim 7, further comprising growing the quantum wells at a first temperature and with an Indium content so that the quantum wells emit green light, wherein the first growth rate maintains smooth interfaces and prevents faceting as compared to the quantum wells grown at a different growth rate.

9. The method of claim 8, wherein each of the quantum wells are between quantum well barriers to form a light emitting active region, and further comprising:

growing the quantum well barriers at a second growth rate slower than the first growth rate, resulting in smooth surface morphology and interfaces for the device layers, including the quantum wells, grown on the quantum well barriers, as compared to the barriers grown at a different faster growth rate.

10. The method of claim 9, further comprising:

growing a high Aluminum content AlGaN electron blocking layer on the active region; and

growing subsequent layers on the active region at a second temperature that is higher than the first temperature and as compared to without the high Al content AlGaN electron blocking layer.

11. The method of claim 10, wherein high Indium content In_xGa_1-xN separate confinement heterostructure (SCH) layers are on either side of the active region and the electron blocking layer, with x>

7%, and further comprising growing the SCH layers at;

(1) a third temperature higher temperature than a temperature used to grow other layers in the LD structure,

(2) a slower growth rate of more than 0.3 Angstroms per second and less than 0.7 Angstroms per second, and

(3) a high Trimethylindium/Triethylgallium (TEG) ratio of greater than 1.1, resulting in a smooth and defect free wave-guiding layer.

12. The method of claim 9, further comprising forming an AlGaN/GaN asymmetric superlattice as cladding layers, on either side of the active region, including alternating AlGaN and GaN layers with the AlGaN layer that is thicker than the GaN layer.

13. The method of claim 9, further comprising forming and doping p-waveguide and p-cladding layers, on one side of the active region, with a magnesium concentration in a range 1×

10¹⁸-2×

10¹⁹ cm<sup>−

3</sup>.

14. The method of claim 13, further comprising depositing a p-GaN contact layer on a p-cladding layer, with a thickness less than 15 nm and a magnesium doping between 7×

10¹⁹-3×

10²⁰.

15. The method of claim 14, further comprising:

following the depositing of the p-GaN contact layer, cooling the LD structure down in nitrogen and ammonia ambient, and flowing a small amount of Bis(cyclopentadienyl)magnesium (Cp₂Mg) until a temperature drops below 700 degrees Celsius, thereby forming a Mg—

Ga—

N layer that has a lower contact resistance to the LD structure.

16. A III-nitride device layer in a III-nitride based laser diode (LD) structure, comprising:

(a) a III-nitride device layer for a LD grown on an off-axis surface of an m-plane III-nitride substrate.

17. The device layers of claim 16, wherein the III-nitride device layer has a top surface with a root mean square (RMS) surface roughness across an area of 25 μ

m² of 1 nm or less.

18. The device layers of claim 16, wherein the top surface is free of pyramidal hillocks.

19. The device layer of claim 18, wherein the top surface is smoother than a top surface of the III-nitride device layer grown on a nominally on-axis m-plane substrate.

20. The device layer of claim 16, wherein the III-nitride device layer is grown on the surface that is off-axis by −

1 or +1 degree with respect to the m-plane of the substrate, and towards c direction of the substrate.

21. The device layer of claim 16, further comprising a plurality of the device layers, wherein:

(1) the top surface is an interface between two of the device layers grown one on top of another; and

(2) the interface is between one or more of the following;

a quantum well and a quantum well barrier, between a waveguide layer and a cladding layer, or between a waveguide layer and a light emitting active layer.

22. The device layer of claim 16, wherein the device layers are in the LD structure processed into the LD, such that, with facet coating, the LD has a threshold current density of 18 kA/cm² or less.

23. The device layer of claim 16, wherein the top surface is smoother than the surface shown in FIG. 4(a).

24. The device layer of claim 16, wherein the device layer is a light emitting active layer including an InGaN quantum well layer having higher In composition, with less In fluctuation across the InGaN quantum well layer, as compared to In composition and In fluctuation in the light emitting InGaN quantum well grown on an on-axis m-plane substrate.

25. The device layer of claim 16, wherein the device layer is a light emitting active layer including an InGaN quantum well layer, having higher In composition, with less In fluctuation across the InGaN quantum well layer, as compared to In composition and In fluctuation shown in FIG. 5(a)).

26. The device layer of claim 16, wherein the device layer is an Mg—

Ga—

N contact layer having a thickness less than 15 nm.

27. The device layer of claim 25, wherein a contact resistance to the Mg—

Ga—

N contact layer is less than 4E-4 Ohm-cm².

28. The device layer of claim 16, wherein, when the LD structure is processed into an LD, the LD emits light having peak intensity at a wavelength corresponding to at least blue-green or green light.