MULTI-PAIR GIGABIT ETHERNET TRANSCEIVER HAVING ADAPTIVE DISABLING OF CIRCUIT ELEMENTS

• US 20100309963A1
• Filed: 06/08/2010
• Published: 12/09/2010
• Est. Priority Date: 11/09/1998
• Status: Active Grant

• Current Assignee: Avago Technologies General IP PTE Limited (Broadcom, Inc.)
• Original Assignee: Broadcom Corporation (Broadcom, Inc.)
• Inventors: Kruse, David E., Hatamian, Mehdi, Creigh, John L., Agazzi, Oscar E., Samueli, Henry, Abnous, Arthur
• Granted Patent: US 8,451,885 B2
• Time in Patent Office: Days
• US Class Current: 375/219
• CPC Class Codes: G01R 31/3004 Current or voltage test
• CPC Class Codes: G01R 31/3008 Quiescent current [IDDQ] test or leakage current test
• CPC Class Codes: G01R 31/3016 Delay or race condition test, e.g. race hazard test
• CPC Class Codes: G01R 31/31715 Testing of input or output circuits; test of circuitry between the I/C pins and the functional core, e.g. testing of input or output driver, receiver, buffer
• CPC Class Codes: G01R 31/318502 Test of Combinational circuits
• CPC Class Codes: G01R 31/318552 Clock circuits details
• CPC Class Codes: G01R 31/318594 Timing aspects clock circuits G01R31/318552
• CPC Class Codes: H04B 3/23 using a replica of transmitted signal in the time domain, e.g. echo cancellers
• CPC Class Codes: H04B 3/235 combined with adaptive equaliser
• CPC Class Codes: H04B 3/32 Reducing cross-talk, e.g. by compensating
• CPC Class Codes: H04L 1/0021 in which the algorithm uses adaptive thresholds
• CPC Class Codes: H04L 1/0047 Decoding adapted to other signal detection operation in conjunction with sequence estimation or equalization H04L25/03286
• CPC Class Codes: H04L 1/0053 specially adapted for power saving
• CPC Class Codes: H04L 1/0054 Maximum-likelihood or sequential decoding, e.g. Viterbi, Fano, ZJ algorithms
• CPC Class Codes: H04L 1/0059 Convolutional codes
• CPC Class Codes: H04L 1/006 Trellis-coded modulation
• CPC Class Codes: H04L 1/242 by comparing a transmitted test signal with a locally generated replica
• CPC Class Codes: H04L 2001/0096 Channel splitting in point-to-point links
• CPC Class Codes: H04L 2025/03363 Multilevel H04L2025/03369 takes precedence
• CPC Class Codes: H04L 2025/03369 Partial response
• CPC Class Codes: H04L 2025/03477 : not time-recursive
• CPC Class Codes: H04L 2025/0349 : as a feedback filter
• CPC Class Codes: H04L 2025/03496 : as a prediction filter
• CPC Class Codes: H04L 2025/03503 : as a combination of feedback and prediction filters
• CPC Class Codes: H04L 2025/03617 : Time recursive algorithms H04L2025/03643 takes precedence
• CPC Class Codes: H04L 2025/03745 : Timing of adaptation
• CPC Class Codes: H04L 25/03038 : with a non-recursive structure H04L25/03031 takes precedence
• CPC Class Codes: H04L 25/03057 : with a recursive structure H04L25/03031 takes precedence
• CPC Class Codes: H04L 25/03146 : with a recursive structure H04L25/03127 takes precedence
• CPC Class Codes: H04L 25/03197 : methods of calculation involving metrics
• CPC Class Codes: H04L 25/03203 : Trellis search techniques
• CPC Class Codes: H04L 25/03235 : with state-reduction using feedback filtering
• CPC Class Codes: H04L 25/03267 : with decision feedback equalisers
• CPC Class Codes: H04L 25/03987 : Equalisation for sparse channels
• CPC Class Codes: H04L 25/067 : providing soft decisions, i.e. decisions together with an estimate of reliability H04L25/068 and H04L25/069 take precedence; sequence estimation techniques H04L25/03178
• CPC Class Codes: H04L 25/14 : Channel dividing arrangements , i.e. in which a single bit stream is divided between several baseband channels and reassembled at the receiver
• CPC Class Codes: H04L 25/4917 : using multilevel codes
• CPC Class Codes: H04L 25/497 : by correlative coding, e.g. partial response coding or echo modulation coding transmitters and receivers for partial response systems transversal equalizers at the transmitter end H04L25/03343
• CPC Class Codes: H04L 7/0062 : detection of error based on data decision error, e.g. Mueller type detection
• CPC Class Codes: H04L 7/0334 : Processing of samples having at least three levels, e.g. soft decisions

Abstract

Various systems and methods providing high speed decoding, enhanced power reduction and clock domain partitioning for a multi-pair gigabit Ethernet transceiver are disclosed. ISI compensation is partitioned into two stages; a first stage compensates ISI components induced by characteristics of a transmitter'"'"'s partial response pulse shaping filter in a demodulator, a second stage compensates ISI components induced by characteristics of a multi-pair transmission channel in a Viterbi decoder. High speed decoding is accomplished by reducing the DFE depth by providing an input signal from a multiple decision feedback equalizer to the Viterbi based on a tail value and a subset of coefficient values received from a unit depth decision-feedback equalizer. Power reduction is accomplished by adaptively truncating active taps in the NEXT, FEXT and echo cancellation filters, or by disabling decoder circuitry portions, as channel response characteristics allow. A receive clock signal is generated such that it is synchronous in frequency with analog sampling clock signals and has a particular phase offset with respect to one of the sampling clock signals. This phase offset is adjusted such that system performance degradation due to coupling of switching noise from the digital sections to the analog sections is substantially minimized.

Claims

1-159. -159. (canceled)

160. An integrated circuit communication device comprising:

a filter having a plurality of taps and operable to process a signal and produce a filtered signal; and

adaptive functionality operable to selectively adjust selected taps of the filter based on signal quality of the filtered signal and power consumption of the filter.

161. The integrated circuit communication device of claim 160 wherein the adaptive functionality is operable to one of activate and deactivate selected taps of the filter based on the signal quality of the filtered signal and the power consumption of the filter.

162. The integrated circuit communication device of claim 160 wherein the adaptive functionality is operable to selectively adjust selected taps of the filter based on an error metric and on the power consumption of the filter.

163. The integrated circuit communication device of claim 160 wherein each tap of the filter has an associated tap coefficient, wherein the adaptive functionality maintains a coefficient threshold, wherein the adaptive functionality is operable to adjust the coefficient threshold based on the signal quality of the filtered signal and the power consumption of the filter, and wherein the adaptive functionality is operable to deactivate any tap having a coefficient less than the threshold.

164. The integrated circuit communication device of claim 163 wherein the adaptive functionality is operable to determine an error metric associated with the filtered signal and to determine a power consumption metric of the filter, wherein the adaptive functionality is operable to decrease the coefficient threshold if the error metric is greater than a specified error threshold and the power consumption metric is less than a specified power consumption threshold.

165. The integrated circuit communication device of claim 164 wherein the adaptive functionality is operable to increase the coefficient threshold if the error metric is less than the specified error threshold and the power consumption metric is greater than the specified power consumption threshold.

166. The integrated circuit communication device of claim 160 wherein the adaptive functionality is operable to minimize the power consumption of the filter while maintaining at least a specified signal quality of the filtered signal.

167. The integrated circuit communication device of claim 160 wherein the adaptive functionality is operable to receive a specified power consumption value and to maximize the signal quality of the filtered signal while maintaining the power consumption of the filter at or below the specified power consumption value.

168. The integrated circuit communication device of claim 160 wherein the filter comprises a finite impulse response filter.

169. An integrated circuit communication device comprising:

a transceiver having a plurality of processing elements and operable to process a signal and produce a processed signal; and

adaptive functionality operable to one of activate and deactivate one or more of the processing elements selectively based on signal quality of the processed signal and power consumption of the plurality of processing elements.

170. The integrated circuit communication device of claim 169 wherein the adaptive functionality is operable to one of activate and deactivate one or more of the processing elements selectively based on an error metric and on the power consumption of the plurality of processing elements.

171. The integrated circuit communication device of claim 169 wherein the adaptive functionality is operable to minimize the power consumption of the plurality of processing elements while maintaining at least a specified signal quality of the processed signal.

172. A method of operating an integrated circuit communication device, the method comprising:

processing a signal using a filter comprising a plurality of taps, thereby producing a processed signal;

determining a signal quality of the processed signal;

determining a power consumption of the filter; and

selectively adjusting selected taps of the filter based on the determined signal quality of the processed signal and the determined power consumption of the filter.

173. The method of claim 172 wherein selectively adjusting selected taps of the filter comprises one of activating and deactivating selected taps of the filter based on the determined signal quality of the processed signal and the determined power consumption of the filter.

174. The method of claim 172 wherein determining a signal quality of the processed signal comprises determining an error metric associated with the processed signal.

175. The method of claim 172 wherein each tap of the filter has an associated tap coefficient and wherein selectively adjusting selected taps of the filter comprises:

maintaining a coefficient threshold;

adjusting the coefficient threshold based on the determined signal quality of the processed signal and the determined power consumption of the filter; and

deactivating any tap having a coefficient less than the threshold.

176. The method of claim 175 wherein determining a signal quality of the processed signal comprises determining an error metric associated with the processed signal, wherein determining a power consumption of the filter comprises determining a power consumption metric of the filter, and wherein adjusting the coefficient threshold comprises decreasing the coefficient threshold if the error metric is greater than a specified error threshold and the power consumption metric is less than a specified power consumption threshold.

177. The method of claim 176 wherein adjusting the coefficient threshold comprises increasing the coefficient threshold if the error metric is less than the specified error threshold and the power consumption metric is greater than the specified power consumption threshold.

178. The method of claim 172 wherein selectively adjusting selected taps of the filter comprises:

receiving a specified signal quality value; and

selectively adjusting selected taps of the filter to minimize the power consumption of the filter while maintaining at least the specified signal quality value of the processed signal.

179. The method of claim 172 wherein selectively adjusting selected taps of the filter comprises:

receiving a specified power consumption value; and

selectively adjusting selected taps of the filter to maximize the signal quality of the processed signal while maintaining the power consumption of the filter at or below the specified power consumption value.

180. The method of claim 172 wherein the filter comprises a finite impulse response filter.