MICROSTRUCTURED PATTERN INSPECTION METHOD

• US 20100314541A1
• Filed: 08/02/2010
• Published: 12/16/2010
• Est. Priority Date: 10/07/1999
• Status: Active Grant

• Current Assignee: Hitachi, Ltd.
• Original Assignee: Hitachi, Ltd.
• Inventors: SASAJIMA, Fumihiro, MIZUNO, Fumio, KOMURO, Osamu
• Granted Patent: US 8,304,724 B2
• Time in Patent Office: Days
• US Class Current: 250/310
• CPC Class Codes: G01N 23/225 using electron or ion
• CPC Class Codes: G03F 7/70608 Monitoring the unpatterned workpiece, e.g. measuring thickness, reflectivity or effects of immersion liquid on resist
• CPC Class Codes: G06T 7/0004 Industrial image inspection
• CPC Class Codes: H01J 2237/221 Image processing
• CPC Class Codes: H01J 2237/24592 Inspection and quality control of devices
• CPC Class Codes: H01J 2237/2487 using digital signal processors
• CPC Class Codes: H01J 37/265 Controlling the tube; circuit arrangements adapted to a particular application not otherwise provided, e.g. bright-field-dark-field illumination
• CPC Class Codes: H01J 37/28 with scanning beams H01J37/268, H01J37/292, H01J37/2955 take precedence

Abstract

The edges of the reticle are detected with respect to the microstructured patterns exposed by the stepper, and the shapes of the microstructured patterns at the surface and at the bottom of the photoresist are detected. The microstructured patterns are evaluated by calculating, and displaying on the screen, the dislocation vector that represents the relationship in position between the detected patterns on the surface and at the bottom of the photoresist. Furthermore, dislocation vectors between the microstructured patterns at multiple positions in a single-chip or single-shot area or on one wafer are likewise calculated, then the sizes and distribution status of the dislocation vectors at each such position are categorized as characteristic quantities, and the corresponding tendencies are analyzed. Thus, stepper or wafer abnormality is detected.

Claims

1. A computer-readable medium making computer display measurement results of a semiconductor wafer, based on electrons detected by a scanning electron microscope, the computer implementing steps, the steps comprising:

obtaining information relating to a measurement value between an upper part of a layer which forms a part of the semiconductor wafer and a lower part of the layer; and

displaying the information for each prescribed area on the semiconductor wafer.